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| author | YunQiang Su <yunqiang.su@cipunited.com> | 2023-04-18 21:27:04 +0800 |
|---|---|---|
| committer | YunQiang Su <yunqiang.su@cipunited.com> | 2023-04-23 14:32:43 +0800 |
| commit | 32f1c80375ebe8ad25d9805ee5889f0006c51e59 (patch) | |
| tree | ca0c5e2eae95fd03048f9c0fa04f243d5c5d00b9 /gold | |
| parent | fda507e61c40b25c339c2dbd7ace70498779f70a (diff) | |
| download | gdb-32f1c80375ebe8ad25d9805ee5889f0006c51e59.zip gdb-32f1c80375ebe8ad25d9805ee5889f0006c51e59.tar.gz gdb-32f1c80375ebe8ad25d9805ee5889f0006c51e59.tar.bz2 | |
MIPS: support mips*64 as CPU and gnuabi64 as ABI
For MIPS64r6 ports, Debian as an example, `mipsisa64r6el` is
used as the cpu name in triple.
Let's recognize them by `mips*64*(el)`.
For 64bit Ports, like Debian's mips64el and mips64r6el ports,
`gnuabi64` is used as the abi section.
Let's use N64 abi by default for the triple with gnuabi64.
Diffstat (limited to 'gold')
| -rw-r--r-- | gold/configure.tgt | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/gold/configure.tgt b/gold/configure.tgt index 4b54e08..ef47ce0 100644 --- a/gold/configure.tgt +++ b/gold/configure.tgt @@ -153,6 +153,13 @@ aarch64*-*) targ_big_endian=false targ_extra_big_endian=true ;; +mips*64*el*-*-*|mips*64*le*-*-*) + targ_obj=mips + targ_machine=EM_MIPS_RS3_LE + targ_size=64 + targ_big_endian=false + targ_extra_big_endian=true + ;; mips*el*-*-*|mips*le*-*-*) targ_obj=mips targ_machine=EM_MIPS_RS3_LE @@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*) targ_big_endian=false targ_extra_big_endian=true ;; +mips*64*-*-*) + targ_obj=mips + targ_machine=EM_MIPS + targ_size=64 + targ_big_endian=true + targ_extra_big_endian=false + ;; mips*-*-*) targ_obj=mips targ_machine=EM_MIPS |