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| author | Peter Bergner <bergner@vnet.ibm.com> | 2015-04-27 11:06:54 -0500 |
|---|---|---|
| committer | Peter Bergner <bergner@vnet.ibm.com> | 2015-04-27 11:06:54 -0500 |
| commit | 4fff86c517abb5ba454befe0ec0f284f720dde00 (patch) | |
| tree | 194862e1b571e94091c27a1fdb9e2476bd54f018 /gold | |
| parent | 5fbae7d108f4b885228cc657449905543c42c85a (diff) | |
| download | gdb-4fff86c517abb5ba454befe0ec0f284f720dde00.zip gdb-4fff86c517abb5ba454befe0ec0f284f720dde00.tar.gz gdb-4fff86c517abb5ba454befe0ec0f284f720dde00.tar.bz2 | |
opcodes/
* ppc-opc.c (DCBT_EO): New define.
(powerpc_opcodes) <lbarx>: Enable for POWER8 and later.
<lharx>: Likewise.
<stbcx.>: Likewise.
<sthcx.>: Likewise.
<waitrsv>: Do not enable for POWER7 and later.
<waitimpl>: Likewise.
<dcbt>: Default to the two operand form of the instruction for all
"old" cpus. For "new" cpus, use the operand ordering that matches
whether the cpu is server or embedded.
<dcbtst>: Likewise.
gas/testsuite/
* gas/ppc/a2.s: Fixup test case due to dcbt/dcbtst embedded operand
ordering change.
* gas/ppc/a2.d: Likewise.
* gas/ppc/476.d: Likewise.
* gas/ppc/booke.s: Remove invalid 3 operand dcbt tests.
* gas/ppc/booke.d: Likewise.
* gas/ppc/power7.s: Remove lbarx, lharx, stbcx., sthcx., waitrsv
and waitimpl tests.
* gas/ppc/power7.d: Likewise.
Diffstat (limited to 'gold')
0 files changed, 0 insertions, 0 deletions