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author | Jozef Lawrynowicz <jozef.l@mittosystems.com> | 2020-02-10 20:37:57 +0000 |
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committer | Jozef Lawrynowicz <jozef.l@mittosystems.com> | 2020-02-10 20:42:36 +0000 |
commit | ac4280dad035bb98fba999c174314435aefdf1a0 (patch) | |
tree | d98902ac63fdef6da63bde52b4cebdff1b2ff70b /gold/powerpc.cc | |
parent | 8d6cb116f47b5edb2a7c2fa540fcb9dbcd3effc2 (diff) | |
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MSP430: Enable relaxation of jump instructions to hard-coded pcrel offsets
This patch fixes execution failures which occur when the BR in a
sequence such as:
J<cond> 1f
BR
1:
is relaxed to a JMP, and the pc-relative offset for the destination of
the J<cond> instruction is hard-coded to be 2 words ahead of the
instruction.
The hard-coded offset will cause execution to jump 1 word ahead of where
it should actually go.
Instead we now detect the hard-coded offset is one we inserted earlier,
and invert the condition, allowing us to remove the BR entirely.
bfd/ChangeLog:
2020-02-10 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* elf32-msp430.c (msp430_elf_relax_section): Before relaxing a branch,
check if previous instruction matches a conditional jump inserted
earlier. Invert conditional jump and delete branch in this case.
Diffstat (limited to 'gold/powerpc.cc')
0 files changed, 0 insertions, 0 deletions