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| author | Andrew Waterman <andrew@sifive.com> | 2016-12-18 22:53:54 -0800 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2016-12-20 12:26:35 +1030 |
| commit | 3e67a37820a2838cdbd50f3f697ddc929443ceaa (patch) | |
| tree | 08aa40e5999f751bb3f38b467c0948e07b87ad2d /gold/ChangeLog | |
| parent | 04386d9ed5f068b74757bfac01670576e4e59b8a (diff) | |
| download | gdb-3e67a37820a2838cdbd50f3f697ddc929443ceaa.zip gdb-3e67a37820a2838cdbd50f3f697ddc929443ceaa.tar.gz gdb-3e67a37820a2838cdbd50f3f697ddc929443ceaa.tar.bz2 | |
Correct assembler mnemonic for RISC-V aqrl AMOs
sc is a misnomer, because they aren't inherently sc.
* riscv-opc.c (riscv_opcodes): Rename the "*.sc" instructions to
"*.aqrl".
Diffstat (limited to 'gold/ChangeLog')
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