* arch-utils.c (TARGET_BYTE_ORDER_DEFAULT): Delete macro.

(target_byte_order): Initialize to BFD_ENDIAN_BIG.
(initialize_current_architecture): Update target_byte_order using
information from BFD.
* config/powerpc/tm-ppcle-eabi.h (TARGET_BYTE_ORDER_DEFAULT):
* config/mcore/tm-mcore.h (TARGET_BYTE_ORDER_DEFAULT):
* config/arm/tm-arm.h (TARGET_BYTE_ORDER_DEFAULT): Delete.

Update doco.

6 files changed, 33 insertions, 23 deletions

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index de8d50b..2a950c9 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,15 @@
 2002-01-28  Andrew Cagney  <ac131313@redhat.com>
 
+	* arch-utils.c (TARGET_BYTE_ORDER_DEFAULT): Delete macro.
+	(target_byte_order): Initialize to BFD_ENDIAN_BIG.
+	(initialize_current_architecture): Update target_byte_order using
+	information from BFD.
+	* config/powerpc/tm-ppcle-eabi.h (TARGET_BYTE_ORDER_DEFAULT):
+	* config/mcore/tm-mcore.h (TARGET_BYTE_ORDER_DEFAULT): 
+	* config/arm/tm-arm.h (TARGET_BYTE_ORDER_DEFAULT): Delete.
+
+2002-01-28  Andrew Cagney  <ac131313@redhat.com>
+
 	* config/vax/tm-vax.h (INVALID_FLOAT): Move macro from here...
 	* vax-tdep.c (INVALID_FLOAT): To here.  Document why it is broken.
 
diff --git a/gdb/arch-utils.c b/gdb/arch-utils.c
index ea95cde..e6cda54 100644
--- a/gdb/arch-utils.c
+++ b/gdb/arch-utils.c
@@ -399,13 +399,14 @@ generic_register_virtual_size (int regnum)
 
 /* Functions to manipulate the endianness of the target.  */
 
-#ifndef TARGET_BYTE_ORDER_DEFAULT
-#define TARGET_BYTE_ORDER_DEFAULT BFD_ENDIAN_BIG /* arbitrary */
-#endif
 /* ``target_byte_order'' is only used when non- multi-arch.
-   Multi-arch targets obtain the current byte order using
-   TARGET_BYTE_ORDER which is controlled by gdbarch.*. */
-int target_byte_order = TARGET_BYTE_ORDER_DEFAULT;
+   Multi-arch targets obtain the current byte order using the
+   TARGET_BYTE_ORDER gdbarch method.
+
+   The choice of initial value is entirely arbitrary.  During startup,
+   the function initialize_current_architecture() updates this value
+   based on default byte-order information extracted from BFD.  */
+int target_byte_order = BFD_ENDIAN_BIG;
 int target_byte_order_auto = 1;
 
 static const char endian_big[] = "big";
@@ -725,9 +726,7 @@ initialize_current_architecture (void)
 			"initialize_current_architecture: Arch not found");
     }
 
-  /* take several guesses at a byte order. */
-  /* NB: can't use TARGET_BYTE_ORDER_DEFAULT as its definition is
-     forced above. */
+  /* Take several guesses at a byte order.  */
   if (info.byte_order == BFD_ENDIAN_UNKNOWN
       && default_bfd_vec != NULL)
     {
@@ -769,7 +768,13 @@ initialize_current_architecture (void)
 	}
     }
   else
-    initialize_non_multiarch ();
+    {
+      /* If the multi-arch logic comes up with a byte-order (from BFD)
+         use it for the non-multi-arch case.  */
+      if (info.byte_order != BFD_ENDIAN_UNKNOWN)
+	target_byte_order = info.byte_order;
+      initialize_non_multiarch ();
+    }
 
   /* Create the ``set architecture'' command appending ``auto'' to the
      list of architectures. */
diff --git a/gdb/config/arm/tm-arm.h b/gdb/config/arm/tm-arm.h
index 6bd95ad..7316f92 100644
--- a/gdb/config/arm/tm-arm.h
+++ b/gdb/config/arm/tm-arm.h
@@ -29,10 +29,6 @@
 struct type;
 struct value;
 
-/* Target byte order on ARM defaults to selectable, and defaults to
-   little endian.  */
-#define TARGET_BYTE_ORDER_DEFAULT BFD_ENDIAN_LITTLE
-
 /* IEEE format floating point.  */
 #define TARGET_DOUBLE_FORMAT  (target_byte_order == BFD_ENDIAN_BIG \
 			       ? &floatformat_ieee_double_big	 \
@@ -169,6 +165,9 @@ extern void arm_float_info (void);
 #define NUM_GREGS	16	/* Number of general purpose registers.  */
 #define NUM_REGS	(NUM_GREGS + NUM_FREGS + NUM_SREGS)
 
+/* An array of names of registers. */
+extern char **arm_register_names;
+
 #define REGISTER_NAME(i) arm_register_name(i)
 char *arm_register_name (int);
 
diff --git a/gdb/config/mcore/tm-mcore.h b/gdb/config/mcore/tm-mcore.h
index 80e438e..7ce6373 100644
--- a/gdb/config/mcore/tm-mcore.h
+++ b/gdb/config/mcore/tm-mcore.h
@@ -20,9 +20,6 @@
 
 #include "regcache.h"
 
-/* The mcore is little endian (by default) */
-#define TARGET_BYTE_ORDER_DEFAULT BFD_ENDIAN_LITTLE
-
 /* All registers are 32 bits */
 #define REGISTER_SIZE 4
 #define MAX_REGISTER_RAW_SIZE 4
diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog
index 1b86ea6..9ca6ef1 100644
--- a/gdb/doc/ChangeLog
+++ b/gdb/doc/ChangeLog
@@ -1,3 +1,8 @@
+2002-01-28  Andrew Cagney  <ac131313@redhat.com>
+
+	* gdbint.texinfo (Target Architecture Definition): Delete
+	description of TARGET_BYTE_ORDER_DEFAULT.
+
 2002-01-27  Eli Zaretskii  <eliz@is.elta.co.il>
 
 	* gdb.texinfo: Fix typos and markup.  From Dmitry Sivachenko
diff --git a/gdb/doc/gdbint.texinfo b/gdb/doc/gdbint.texinfo
index a79ce97..85536c3 100644
--- a/gdb/doc/gdbint.texinfo
+++ b/gdb/doc/gdbint.texinfo
@@ -3471,12 +3471,6 @@ where @var{valbuf} is the address of the value to be stored.
 The default value of the ``symbol-reloading'' variable.  (Never defined in
 current sources.)
 
-@item TARGET_BYTE_ORDER_DEFAULT
-@findex TARGET_BYTE_ORDER_DEFAULT
-The ordering of bytes in the target.  This must be either
-@code{BFD_ENDIAN_BIG} or @code{BFD_ENDIAN_LITTLE}.  This macro replaces
-@code{TARGET_BYTE_ORDER} which is deprecated.
-
 @item TARGET_CHAR_BIT
 @findex TARGET_CHAR_BIT
 Number of bits in a char; defaults to 8.