* gdbarch.sh (software_single_step): Replace REGCACHE argument by

	FRAME argument.
	* gdbarch.c, gdbarch.h: Regenerate.
	* infrun.c (resume): Pass current frame to SOFTWARE_SINGLE_STEP.

	* alpha-tdep.c (alpha_next_pc): Add FRAME argument.  Retrieve
	registers from FRAME instead of using read_register.
	(alpha_software_single_step): Replace REGCACHE by FRAME.  Pass FRAME
	to alpha_next_pc.  Use get_frame_pc instead of read_pc.
	* alpha-tdep.h (alpha_software_single_step): Replace REGCACHE
	argument by FRAME.

	* arm-tdep.c (shifted_reg_val): Add FRAME argument.  Read registers
	from FRAME instead of using read_register.
	(thumb_get_next_pc): Likewise.
	(arm_get_next_pc): Likewise.
	(arm_software_single_step): Replace REGCACHE by FRAME.  Pass FRAME
	to arm_get_next_pc.  Use get_frame_pc instead of read_register.
	* arm-tdep.h (arm_software_single_step): Replace REGCACHE
	argument by FRAME.

	* cris-tdep.c (find_step_target): Add FRAME argument.  Read registers
	from FRAME instead of using read_register.
	(cris_software_single_step): Replace REGCACHE by FRAME.  Pass FRAME
	to find_step_target.

	* mips-tdep.c (mips32_next_pc): Add FRAME argument.  Read registers
	from FRAME instead of using read_register / read_signed_register.
	(extended_mips16_next_pc): Likewise.
	(mips16_next_pc): Likewise.
	(mips_next_pc): Likewise.
	(mips_software_single_step): Replace REGCACHE by FRAME.  Pass FRAME
	to mips_next_pc.  Use get_frame_pc instead of read_pc.
	* mips-tdep.h (mips_software_single_step): Replace REGCACHE
	argument by FRAME.

	* rs6000-tdep.c (branch_dest): Add FRAME argument.  Use it instead
	of current frame.  Read registers from FRAME.
	(deal_with_atomic_sequence): Add FRAME argument.  Pass it to
	branch_dest.  Use get_frame_pc instead of read_pc.
	(rs6000_software_single_step): Likewise.
	(bl_to_blrl_insn_p): Do not call branch_dest.
	* rs6000-tdep.h (rs6000_software_single_step): Replace REGCACHE
	argument by FRAME.

	* sparc64-linux-tdep.c (sparc64_linux_step_trap): Add FRAME argument.
	Read registers from FRAME instead of current regcache.
	* sparc-linux-tdep.c (sparc32_linux_step_trap): Likewise.
	* sparcnbsd-tdep.c (sparcnbsd_step_trap): Likewise.
	* sparc-tdep.c (sparc_address_from_register): Remove.
	(sparc_analyze_control_transfer): Pass FRAME argument instead of
	GDBARCH.  Pass FRAME to step_trap callback.
	(sparc_step_trap): Add FRAME argument.
	(space_software_single_step): Replace REGCACHE by FRAME.  Pass FRAME
	to sparc_analyze_control_transfer.  Read registers from FRAME instead
	of calling sparc_address_from_register.
	* sparc-tdep.h (struct gdbarch_tdep): Add FRAME argument to
	step_trap callback.
	(sparc_address_from_register): Remove prototype.
	(sparc_software_single_step): Replace REGCACHE argument by FRAME.
	(sparcnbsd_step_trap): Add FRAME argument.

	* spu-tdep.c (spu_software_single_step): Replace REGCACHE argument
	by FRAME.  Read registers from FRAME instead of REGCACHE.

20 files changed, 198 insertions, 150 deletions

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 9ab9f92..94c0223 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,73 @@
 2007-06-15  Ulrich Weigand  <uweigand@de.ibm.com>
 
+	* gdbarch.sh (software_single_step): Replace REGCACHE argument by
+	FRAME argument.
+	* gdbarch.c, gdbarch.h: Regenerate.
+	* infrun.c (resume): Pass current frame to SOFTWARE_SINGLE_STEP.
+
+	* alpha-tdep.c (alpha_next_pc): Add FRAME argument.  Retrieve
+	registers from FRAME instead of using read_register.
+	(alpha_software_single_step): Replace REGCACHE by FRAME.  Pass FRAME
+	to alpha_next_pc.  Use get_frame_pc instead of read_pc.
+	* alpha-tdep.h (alpha_software_single_step): Replace REGCACHE
+	argument by FRAME.
+
+	* arm-tdep.c (shifted_reg_val): Add FRAME argument.  Read registers
+	from FRAME instead of using read_register.
+	(thumb_get_next_pc): Likewise.
+	(arm_get_next_pc): Likewise.
+	(arm_software_single_step): Replace REGCACHE by FRAME.  Pass FRAME
+	to arm_get_next_pc.  Use get_frame_pc instead of read_register.
+	* arm-tdep.h (arm_software_single_step): Replace REGCACHE
+	argument by FRAME.
+
+	* cris-tdep.c (find_step_target): Add FRAME argument.  Read registers
+	from FRAME instead of using read_register.
+	(cris_software_single_step): Replace REGCACHE by FRAME.  Pass FRAME
+	to find_step_target.
+
+	* mips-tdep.c (mips32_next_pc): Add FRAME argument.  Read registers
+	from FRAME instead of using read_register / read_signed_register.
+	(extended_mips16_next_pc): Likewise.
+	(mips16_next_pc): Likewise.
+	(mips_next_pc): Likewise.
+	(mips_software_single_step): Replace REGCACHE by FRAME.  Pass FRAME
+	to mips_next_pc.  Use get_frame_pc instead of read_pc.
+	* mips-tdep.h (mips_software_single_step): Replace REGCACHE
+	argument by FRAME.
+
+	* rs6000-tdep.c (branch_dest): Add FRAME argument.  Use it instead
+	of current frame.  Read registers from FRAME.
+	(deal_with_atomic_sequence): Add FRAME argument.  Pass it to
+	branch_dest.  Use get_frame_pc instead of read_pc.
+	(rs6000_software_single_step): Likewise.
+	(bl_to_blrl_insn_p): Do not call branch_dest.
+	* rs6000-tdep.h (rs6000_software_single_step): Replace REGCACHE
+	argument by FRAME.
+
+	* sparc64-linux-tdep.c (sparc64_linux_step_trap): Add FRAME argument.
+	Read registers from FRAME instead of current regcache.
+	* sparc-linux-tdep.c (sparc32_linux_step_trap): Likewise.
+	* sparcnbsd-tdep.c (sparcnbsd_step_trap): Likewise.
+	* sparc-tdep.c (sparc_address_from_register): Remove.
+	(sparc_analyze_control_transfer): Pass FRAME argument instead of
+	GDBARCH.  Pass FRAME to step_trap callback.
+	(sparc_step_trap): Add FRAME argument.
+	(space_software_single_step): Replace REGCACHE by FRAME.  Pass FRAME
+	to sparc_analyze_control_transfer.  Read registers from FRAME instead
+	of calling sparc_address_from_register.
+	* sparc-tdep.h (struct gdbarch_tdep): Add FRAME argument to
+	step_trap callback.
+	(sparc_address_from_register): Remove prototype.
+	(sparc_software_single_step): Replace REGCACHE argument by FRAME.
+	(sparcnbsd_step_trap): Add FRAME argument.
+
+	* spu-tdep.c (spu_software_single_step): Replace REGCACHE argument
+	by FRAME.  Read registers from FRAME instead of REGCACHE.
+
+
+2007-06-15  Ulrich Weigand  <uweigand@de.ibm.com>
+
 	* arm-tdep.c (arm_print_float_info): Use register value from FRAME
 	instead of calling read_register.
 
diff --git a/gdb/alpha-tdep.c b/gdb/alpha-tdep.c
index 551be67..eb1daad 100644
--- a/gdb/alpha-tdep.c
+++ b/gdb/alpha-tdep.c
@@ -1398,14 +1398,13 @@ fp_register_sign_bit (LONGEST reg)
    the target of the coming instruction and breakpoint it.  */
 
 static CORE_ADDR
-alpha_next_pc (CORE_ADDR pc)
+alpha_next_pc (struct frame_info *frame, CORE_ADDR pc)
 {
   unsigned int insn;
   unsigned int op;
   int regno;
   int offset;
   LONGEST rav;
-  gdb_byte reg[ALPHA_REGISTER_SIZE];
 
   insn = alpha_read_insn (pc);
 
@@ -1416,7 +1415,7 @@ alpha_next_pc (CORE_ADDR pc)
     {
       /* Jump format: target PC is:
 	 RB & ~3  */
-      return (read_register ((insn >> 16) & 0x1f) & ~3);
+      return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3);
     }
 
   if ((op & 0x30) == 0x30)
@@ -1447,8 +1446,7 @@ alpha_next_pc (CORE_ADDR pc)
             regno += FP0_REGNUM;
 	}
       
-      regcache_cooked_read (current_regcache, regno, reg);
-      rav = extract_signed_integer (reg, ALPHA_REGISTER_SIZE);
+      rav = get_frame_register_signed (frame, regno);
 
       switch (op)
 	{
@@ -1520,12 +1518,12 @@ alpha_next_pc (CORE_ADDR pc)
 }
 
 int
-alpha_software_single_step (struct regcache *regcache)
+alpha_software_single_step (struct frame_info *frame)
 {
   CORE_ADDR pc, next_pc;
 
-  pc = read_pc ();
-  next_pc = alpha_next_pc (pc);
+  pc = get_frame_pc (frame);
+  next_pc = alpha_next_pc (frame, pc);
 
   insert_single_step_breakpoint (next_pc);
   return 1;
diff --git a/gdb/alpha-tdep.h b/gdb/alpha-tdep.h
index 87aaf84..d68ed0b 100644
--- a/gdb/alpha-tdep.h
+++ b/gdb/alpha-tdep.h
@@ -109,7 +109,7 @@ struct gdbarch_tdep
 };
 
 extern unsigned int alpha_read_insn (CORE_ADDR pc);
-extern int alpha_software_single_step (struct regcache *regcache);
+extern int alpha_software_single_step (struct frame_info *frame);
 extern CORE_ADDR alpha_after_prologue (CORE_ADDR pc);
 
 extern void alpha_mdebug_init_abi (struct gdbarch_info, struct gdbarch *);
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 9259ac8..fc7c6bd 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -1547,8 +1547,8 @@ condition_true (unsigned long cond, unsigned long status_reg)
 #define ARM_PC_32 1
 
 static unsigned long
-shifted_reg_val (unsigned long inst, int carry, unsigned long pc_val,
-		 unsigned long status_reg)
+shifted_reg_val (struct frame_info *frame, unsigned long inst, int carry,
+		 unsigned long pc_val, unsigned long status_reg)
 {
   unsigned long res, shift;
   int rm = bits (inst, 0, 3);
@@ -1557,7 +1557,8 @@ shifted_reg_val (unsigned long inst, int carry, unsigned long pc_val,
   if (bit (inst, 4))
     {
       int rs = bits (inst, 8, 11);
-      shift = (rs == 15 ? pc_val + 8 : read_register (rs)) & 0xFF;
+      shift = (rs == 15 ? pc_val + 8
+			: get_frame_register_unsigned (frame, rs)) & 0xFF;
     }
   else
     shift = bits (inst, 7, 11);
@@ -1565,7 +1566,7 @@ shifted_reg_val (unsigned long inst, int carry, unsigned long pc_val,
   res = (rm == 15
 	 ? ((pc_val | (ARM_PC_32 ? 0 : status_reg))
 	    + (bit (inst, 4) ? 12 : 8))
-	 : read_register (rm));
+	 : get_frame_register_unsigned (frame, rm));
 
   switch (shifttype)
     {
@@ -1608,7 +1609,7 @@ bitcount (unsigned long val)
 }
 
 static CORE_ADDR
-thumb_get_next_pc (CORE_ADDR pc)
+thumb_get_next_pc (struct frame_info *frame, CORE_ADDR pc)
 {
   unsigned long pc_val = ((unsigned long) pc) + 4;	/* PC after prefetch */
   unsigned short inst1 = read_memory_unsigned_integer (pc, 2);
@@ -1622,7 +1623,7 @@ thumb_get_next_pc (CORE_ADDR pc)
       /* Fetch the saved PC from the stack.  It's stored above
          all of the other registers.  */
       offset = bitcount (bits (inst1, 0, 7)) * DEPRECATED_REGISTER_SIZE;
-      sp = read_register (ARM_SP_REGNUM);
+      sp = get_frame_register_unsigned (frame, ARM_SP_REGNUM);
       nextpc = (CORE_ADDR) read_memory_unsigned_integer (sp + offset, 4);
       nextpc = gdbarch_addr_bits_remove (current_gdbarch, nextpc);
       if (nextpc == pc)
@@ -1630,7 +1631,7 @@ thumb_get_next_pc (CORE_ADDR pc)
     }
   else if ((inst1 & 0xf000) == 0xd000)	/* conditional branch */
     {
-      unsigned long status = read_register (ARM_PS_REGNUM);
+      unsigned long status = get_frame_register_unsigned (frame, ARM_PS_REGNUM);
       unsigned long cond = bits (inst1, 8, 11);
       if (cond != 0x0f && condition_true (cond, status))    /* 0x0f = SWI */
 	nextpc = pc_val + (sbits (inst1, 0, 7) << 1);
@@ -1653,7 +1654,7 @@ thumb_get_next_pc (CORE_ADDR pc)
       if (bits (inst1, 3, 6) == 0x0f)
 	nextpc = pc_val;
       else
-	nextpc = read_register (bits (inst1, 3, 6));
+	nextpc = get_frame_register_unsigned (frame, bits (inst1, 3, 6));
 
       nextpc = gdbarch_addr_bits_remove (current_gdbarch, nextpc);
       if (nextpc == pc)
@@ -1664,7 +1665,7 @@ thumb_get_next_pc (CORE_ADDR pc)
 }
 
 static CORE_ADDR
-arm_get_next_pc (CORE_ADDR pc)
+arm_get_next_pc (struct frame_info *frame, CORE_ADDR pc)
 {
   unsigned long pc_val;
   unsigned long this_instr;
@@ -1672,11 +1673,11 @@ arm_get_next_pc (CORE_ADDR pc)
   CORE_ADDR nextpc;
 
   if (arm_pc_is_thumb (pc))
-    return thumb_get_next_pc (pc);
+    return thumb_get_next_pc (frame, pc);
 
   pc_val = (unsigned long) pc;
   this_instr = read_memory_unsigned_integer (pc, 4);
-  status = read_register (ARM_PS_REGNUM);
+  status = get_frame_register_unsigned (frame, ARM_PS_REGNUM);
   nextpc = (CORE_ADDR) (pc_val + 4);	/* Default case */
 
   if (condition_true (bits (this_instr, 28, 31), status))
@@ -1704,7 +1705,8 @@ arm_get_next_pc (CORE_ADDR pc)
 		|| bits (this_instr, 4, 27) == 0x12fff3)
 	      {
 		rn = bits (this_instr, 0, 3);
-		result = (rn == 15) ? pc_val + 8 : read_register (rn);
+		result = (rn == 15) ? pc_val + 8
+				    : get_frame_register_unsigned (frame, rn);
 		nextpc = (CORE_ADDR) gdbarch_addr_bits_remove
 				       (current_gdbarch, result);
 
@@ -1717,7 +1719,8 @@ arm_get_next_pc (CORE_ADDR pc)
 	    /* Multiply into PC */
 	    c = (status & FLAG_C) ? 1 : 0;
 	    rn = bits (this_instr, 16, 19);
-	    operand1 = (rn == 15) ? pc_val + 8 : read_register (rn);
+	    operand1 = (rn == 15) ? pc_val + 8
+				  : get_frame_register_unsigned (frame, rn);
 
 	    if (bit (this_instr, 25))
 	      {
@@ -1727,7 +1730,7 @@ arm_get_next_pc (CORE_ADDR pc)
 		  & 0xffffffff;
 	      }
 	    else		/* operand 2 is a shifted register */
-	      operand2 = shifted_reg_val (this_instr, c, pc_val, status);
+	      operand2 = shifted_reg_val (frame, this_instr, c, pc_val, status);
 
 	    switch (bits (this_instr, 21, 24))
 	      {
@@ -1813,14 +1816,15 @@ arm_get_next_pc (CORE_ADDR pc)
 
 		  /* byte write to PC */
 		  rn = bits (this_instr, 16, 19);
-		  base = (rn == 15) ? pc_val + 8 : read_register (rn);
+		  base = (rn == 15) ? pc_val + 8
+				    : get_frame_register_unsigned (frame, rn);
 		  if (bit (this_instr, 24))
 		    {
 		      /* pre-indexed */
 		      int c = (status & FLAG_C) ? 1 : 0;
 		      unsigned long offset =
 		      (bit (this_instr, 25)
-		       ? shifted_reg_val (this_instr, c, pc_val, status)
+		       ? shifted_reg_val (frame, this_instr, c, pc_val, status)
 		       : bits (this_instr, 0, 11));
 
 		      if (bit (this_instr, 23))
@@ -1862,7 +1866,8 @@ arm_get_next_pc (CORE_ADDR pc)
 
 		  {
 		    unsigned long rn_val =
-		    read_register (bits (this_instr, 16, 19));
+		    get_frame_register_unsigned (frame,
+						 bits (this_instr, 16, 19));
 		    nextpc =
 		      (CORE_ADDR) read_memory_integer ((CORE_ADDR) (rn_val
 								  + offset),
@@ -1912,13 +1917,13 @@ arm_get_next_pc (CORE_ADDR pc)
    and breakpoint it.  */
 
 int
-arm_software_single_step (struct regcache *regcache)
+arm_software_single_step (struct frame_info *frame)
 {
   /* NOTE: This may insert the wrong breakpoint instruction when
      single-stepping over a mode-changing instruction, if the
      CPSR heuristics are used.  */
 
-  CORE_ADDR next_pc = arm_get_next_pc (read_register (ARM_PC_REGNUM));
+  CORE_ADDR next_pc = arm_get_next_pc (frame, get_frame_pc (frame));
   insert_single_step_breakpoint (next_pc);
 
   return 1;
diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h
index 46894ab..fe5417e 100644
--- a/gdb/arm-tdep.h
+++ b/gdb/arm-tdep.h
@@ -182,7 +182,7 @@ struct gdbarch_tdep
 #define LOWEST_PC (gdbarch_tdep (current_gdbarch)->lowest_pc)
 #endif
 
-int arm_software_single_step (struct regcache *);
+int arm_software_single_step (struct frame_info *);
 
 /* Functions exported from armbsd-tdep.h.  */
 
diff --git a/gdb/cris-tdep.c b/gdb/cris-tdep.c
index 8b86028..4af4726 100644
--- a/gdb/cris-tdep.c
+++ b/gdb/cris-tdep.c
@@ -2059,7 +2059,7 @@ find_cris_op (unsigned short insn, inst_env_type *inst_env)
    actually an internal error.  */
 
 static int
-find_step_target (inst_env_type *inst_env)
+find_step_target (struct frame_info *frame, inst_env_type *inst_env)
 {
   int i;
   int offset;
@@ -2068,12 +2068,14 @@ find_step_target (inst_env_type *inst_env)
   /* Create a local register image and set the initial state.  */
   for (i = 0; i < NUM_GENREGS; i++)
     {
-      inst_env->reg[i] = (unsigned long) read_register (i);
+      inst_env->reg[i] = 
+	(unsigned long) get_frame_register_unsigned (frame, i);
     }
   offset = NUM_GENREGS;
   for (i = 0; i < NUM_SPECREGS; i++)
     {
-      inst_env->preg[i] = (unsigned long) read_register (offset + i);
+      inst_env->preg[i] = 
+	(unsigned long) get_frame_register_unsigned (frame, offset + i);
     }
   inst_env->branch_found = 0;
   inst_env->slot_needed = 0;
@@ -2124,13 +2126,13 @@ find_step_target (inst_env_type *inst_env)
    Either one ordinary target or two targets for branches may be found.  */
 
 static int
-cris_software_single_step (struct regcache *regcache)
+cris_software_single_step (struct frame_info *frame)
 {
   inst_env_type inst_env;
 
   /* Analyse the present instruction environment and insert 
      breakpoints.  */
-  int status = find_step_target (&inst_env);
+  int status = find_step_target (frame, &inst_env);
   if (status == -1)
     {
       /* Could not find a target.  Things are likely to go downhill 
diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c
index 2ffc659..df76766 100644
--- a/gdb/gdbarch.c
+++ b/gdb/gdbarch.c
@@ -1099,8 +1099,8 @@ gdbarch_dump (struct gdbarch *current_gdbarch, struct ui_file *file)
 #ifdef SOFTWARE_SINGLE_STEP
   fprintf_unfiltered (file,
                       "gdbarch_dump: %s # %s\n",
-                      "SOFTWARE_SINGLE_STEP(regcache)",
-                      XSTRING (SOFTWARE_SINGLE_STEP (regcache)));
+                      "SOFTWARE_SINGLE_STEP(frame)",
+                      XSTRING (SOFTWARE_SINGLE_STEP (frame)));
 #endif
   fprintf_unfiltered (file,
                       "gdbarch_dump: software_single_step = <0x%lx>\n",
@@ -2711,13 +2711,13 @@ gdbarch_software_single_step_p (struct gdbarch *gdbarch)
 }
 
 int
-gdbarch_software_single_step (struct gdbarch *gdbarch, struct regcache *regcache)
+gdbarch_software_single_step (struct gdbarch *gdbarch, struct frame_info *frame)
 {
   gdb_assert (gdbarch != NULL);
   gdb_assert (gdbarch->software_single_step != NULL);
   if (gdbarch_debug >= 2)
     fprintf_unfiltered (gdb_stdlog, "gdbarch_software_single_step called\n");
-  return gdbarch->software_single_step (regcache);
+  return gdbarch->software_single_step (frame);
 }
 
 void
diff --git a/gdb/gdbarch.h b/gdb/gdbarch.h
index 7fd1248..dcaf5eb 100644
--- a/gdb/gdbarch.h
+++ b/gdb/gdbarch.h
@@ -702,14 +702,14 @@ extern int gdbarch_software_single_step_p (struct gdbarch *gdbarch);
 #define SOFTWARE_SINGLE_STEP_P() (gdbarch_software_single_step_p (current_gdbarch))
 #endif
 
-typedef int (gdbarch_software_single_step_ftype) (struct regcache *regcache);
-extern int gdbarch_software_single_step (struct gdbarch *gdbarch, struct regcache *regcache);
+typedef int (gdbarch_software_single_step_ftype) (struct frame_info *frame);
+extern int gdbarch_software_single_step (struct gdbarch *gdbarch, struct frame_info *frame);
 extern void set_gdbarch_software_single_step (struct gdbarch *gdbarch, gdbarch_software_single_step_ftype *software_single_step);
 #if !defined (GDB_TM_FILE) && defined (SOFTWARE_SINGLE_STEP)
 #error "Non multi-arch definition of SOFTWARE_SINGLE_STEP"
 #endif
 #if !defined (SOFTWARE_SINGLE_STEP)
-#define SOFTWARE_SINGLE_STEP(regcache) (gdbarch_software_single_step (current_gdbarch, regcache))
+#define SOFTWARE_SINGLE_STEP(frame) (gdbarch_software_single_step (current_gdbarch, frame))
 #endif
 
 /* Return non-zero if the processor is executing a delay slot and a
diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh
index a36b30e..1f7d150 100755
--- a/gdb/gdbarch.sh
+++ b/gdb/gdbarch.sh
@@ -608,7 +608,7 @@ f::CORE_ADDR:smash_text_address:CORE_ADDR addr:addr::core_addr_identity::0
 #
 # A return value of 1 means that the software_single_step breakpoints 
 # were inserted; 0 means they were not.
-F:=:int:software_single_step:struct regcache *regcache:regcache
+F:=:int:software_single_step:struct frame_info *frame:frame
 
 # Return non-zero if the processor is executing a delay slot and a
 # further single-step is needed before the instruction finishes.
diff --git a/gdb/infrun.c b/gdb/infrun.c
index 7b05504..ae530b7 100644
--- a/gdb/infrun.c
+++ b/gdb/infrun.c
@@ -539,7 +539,7 @@ a command like `return' or `jump' to continue execution."));
   if (SOFTWARE_SINGLE_STEP_P () && step)
     {
       /* Do it the hard way, w/temp breakpoints */
-      if (SOFTWARE_SINGLE_STEP (current_regcache))
+      if (SOFTWARE_SINGLE_STEP (get_current_frame ()))
         {
           /* ...and don't ask hardware to do it.  */
           step = 0;
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 1994066..dfa10ab 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -1017,7 +1017,7 @@ mips32_relative_offset (ULONGEST inst)
 /* Determine where to set a single step breakpoint while considering
    branch prediction.  */
 static CORE_ADDR
-mips32_next_pc (CORE_ADDR pc)
+mips32_next_pc (struct frame_info *frame, CORE_ADDR pc)
 {
   unsigned long inst;
   int op;
@@ -1048,8 +1048,8 @@ mips32_next_pc (CORE_ADDR pc)
 	  int tf = itype_rt (inst) & 0x01;
 	  int cnum = itype_rt (inst) >> 2;
 	  int fcrcs =
-	    read_signed_register (mips_regnum (current_gdbarch)->
-				  fp_control_status);
+	    get_frame_register_signed (frame, mips_regnum (current_gdbarch)->
+						fp_control_status);
 	  int cond = ((fcrcs >> 24) & 0x0e) | ((fcrcs >> 23) & 0x01);
 
 	  if (((cond >> cnum) & 0x01) == tf)
@@ -1073,7 +1073,7 @@ mips32_next_pc (CORE_ADDR pc)
 	    case 8:		/* JR */
 	    case 9:		/* JALR */
 	      /* Set PC to that address */
-	      pc = read_signed_register (rtype_rs (inst));
+	      pc = get_frame_register_signed (frame, rtype_rs (inst));
 	      break;
 	    default:
 	      pc += 4;
@@ -1090,7 +1090,7 @@ mips32_next_pc (CORE_ADDR pc)
 	      case 16:		/* BLTZAL */
 	      case 18:		/* BLTZALL */
 	      less_branch:
-		if (read_signed_register (itype_rs (inst)) < 0)
+		if (get_frame_register_signed (frame, itype_rs (inst)) < 0)
 		  pc += mips32_relative_offset (inst) + 4;
 		else
 		  pc += 8;	/* after the delay slot */
@@ -1099,7 +1099,7 @@ mips32_next_pc (CORE_ADDR pc)
 	      case 3:		/* BGEZL */
 	      case 17:		/* BGEZAL */
 	      case 19:		/* BGEZALL */
-		if (read_signed_register (itype_rs (inst)) >= 0)
+		if (get_frame_register_signed (frame, itype_rs (inst)) >= 0)
 		  pc += mips32_relative_offset (inst) + 4;
 		else
 		  pc += 8;	/* after the delay slot */
@@ -1129,22 +1129,22 @@ mips32_next_pc (CORE_ADDR pc)
 	  break;		/* The new PC will be alternate mode */
 	case 4:		/* BEQ, BEQL */
 	equal_branch:
-	  if (read_signed_register (itype_rs (inst)) ==
-	      read_signed_register (itype_rt (inst)))
+	  if (get_frame_register_signed (frame, itype_rs (inst)) ==
+	      get_frame_register_signed (frame, itype_rt (inst)))
 	    pc += mips32_relative_offset (inst) + 4;
 	  else
 	    pc += 8;
 	  break;
 	case 5:		/* BNE, BNEL */
 	neq_branch:
-	  if (read_signed_register (itype_rs (inst)) !=
-	      read_signed_register (itype_rt (inst)))
+	  if (get_frame_register_signed (frame, itype_rs (inst)) !=
+	      get_frame_register_signed (frame, itype_rt (inst)))
 	    pc += mips32_relative_offset (inst) + 4;
 	  else
 	    pc += 8;
 	  break;
 	case 6:		/* BLEZ, BLEZL */
-	  if (read_signed_register (itype_rs (inst)) <= 0)
+	  if (get_frame_register_signed (frame, itype_rs (inst)) <= 0)
 	    pc += mips32_relative_offset (inst) + 4;
 	  else
 	    pc += 8;
@@ -1152,7 +1152,7 @@ mips32_next_pc (CORE_ADDR pc)
 	case 7:
 	default:
 	greater_branch:	/* BGTZ, BGTZL */
-	  if (read_signed_register (itype_rs (inst)) > 0)
+	  if (get_frame_register_signed (frame, itype_rs (inst)) > 0)
 	    pc += mips32_relative_offset (inst) + 4;
 	  else
 	    pc += 8;
@@ -1333,7 +1333,7 @@ add_offset_16 (CORE_ADDR pc, int offset)
 }
 
 static CORE_ADDR
-extended_mips16_next_pc (CORE_ADDR pc,
+extended_mips16_next_pc (struct frame_info *frame, CORE_ADDR pc,
 			 unsigned int extension, unsigned int insn)
 {
   int op = (insn >> 11);
@@ -1369,7 +1369,7 @@ extended_mips16_next_pc (CORE_ADDR pc,
 	struct upk_mips16 upk;
 	int reg;
 	unpack_mips16 (pc, extension, insn, ritype, &upk);
-	reg = read_signed_register (upk.regx);
+	reg = get_frame_register_signed (frame, upk.regx);
 	if (reg == 0)
 	  pc += (upk.offset << 1) + 2;
 	else
@@ -1381,7 +1381,7 @@ extended_mips16_next_pc (CORE_ADDR pc,
 	struct upk_mips16 upk;
 	int reg;
 	unpack_mips16 (pc, extension, insn, ritype, &upk);
-	reg = read_signed_register (upk.regx);
+	reg = get_frame_register_signed (frame, upk.regx);
 	if (reg != 0)
 	  pc += (upk.offset << 1) + 2;
 	else
@@ -1394,7 +1394,7 @@ extended_mips16_next_pc (CORE_ADDR pc,
 	int reg;
 	unpack_mips16 (pc, extension, insn, i8type, &upk);
 	/* upk.regx contains the opcode */
-	reg = read_signed_register (24);	/* Test register is 24 */
+	reg = get_frame_register_signed (frame, 24);  /* Test register is 24 */
 	if (((upk.regx == 0) && (reg == 0))	/* BTEZ */
 	    || ((upk.regx == 1) && (reg != 0)))	/* BTNEZ */
 	  /* pc = add_offset_16(pc,upk.offset) ; */
@@ -1428,7 +1428,7 @@ extended_mips16_next_pc (CORE_ADDR pc,
 		reg = 31;
 		break;		/* BOGUS Guess */
 	      }
-	    pc = read_signed_register (reg);
+	    pc = get_frame_register_signed (frame, reg);
 	  }
 	else
 	  pc += 2;
@@ -1440,7 +1440,7 @@ extended_mips16_next_pc (CORE_ADDR pc,
          that. */
       {
 	pc += 2;
-	pc = extended_mips16_next_pc (pc, insn, fetch_mips_16 (pc));
+	pc = extended_mips16_next_pc (frame, pc, insn, fetch_mips_16 (pc));
 	break;
       }
     default:
@@ -1453,10 +1453,10 @@ extended_mips16_next_pc (CORE_ADDR pc,
 }
 
 static CORE_ADDR
-mips16_next_pc (CORE_ADDR pc)
+mips16_next_pc (struct frame_info *frame, CORE_ADDR pc)
 {
   unsigned int insn = fetch_mips_16 (pc);
-  return extended_mips16_next_pc (pc, 0, insn);
+  return extended_mips16_next_pc (frame, pc, 0, insn);
 }
 
 /* The mips_next_pc function supports single_step when the remote
@@ -1465,12 +1465,12 @@ mips16_next_pc (CORE_ADDR pc)
    branch will go. This isnt hard because all the data is available.
    The MIPS32 and MIPS16 variants are quite different */
 static CORE_ADDR
-mips_next_pc (CORE_ADDR pc)
+mips_next_pc (struct frame_info *frame, CORE_ADDR pc)
 {
   if (pc & 0x01)
-    return mips16_next_pc (pc);
+    return mips16_next_pc (frame, pc);
   else
-    return mips32_next_pc (pc);
+    return mips32_next_pc (frame, pc);
 }
 
 struct mips_frame_cache
@@ -2323,12 +2323,12 @@ mips_addr_bits_remove (CORE_ADDR addr)
    the target of the coming instruction and breakpoint it.  */
 
 int
-mips_software_single_step (struct regcache *regcache)
+mips_software_single_step (struct frame_info *frame)
 {
   CORE_ADDR pc, next_pc;
 
-  pc = read_register (mips_regnum (current_gdbarch)->pc);
-  next_pc = mips_next_pc (pc);
+  pc = get_frame_pc (frame);
+  next_pc = mips_next_pc (frame, pc);
 
   insert_single_step_breakpoint (next_pc);
   return 1;
diff --git a/gdb/mips-tdep.h b/gdb/mips-tdep.h
index 11f6c85..3e5ca44 100644
--- a/gdb/mips-tdep.h
+++ b/gdb/mips-tdep.h
@@ -95,7 +95,7 @@ enum
 };
 
 /* Single step based on where the current instruction will take us.  */
-extern int mips_software_single_step (struct regcache *regcache);
+extern int mips_software_single_step (struct frame_info *frame);
 
 /* Tell if the program counter value in MEMADDR is in a MIPS16
    function.  */
diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index 7712bd2..20d76cf 100644
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -118,8 +118,8 @@ CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL;
 
 /* Static function prototypes */
 
-static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc,
-			      CORE_ADDR safety);
+static CORE_ADDR branch_dest (struct frame_info *frame, int opcode,
+			      int instr, CORE_ADDR pc, CORE_ADDR safety);
 static CORE_ADDR skip_prologue (CORE_ADDR, CORE_ADDR,
                                 struct rs6000_framedata *);
 
@@ -624,8 +624,10 @@ rs6000_fetch_pointer_argument (struct frame_info *frame, int argi,
 /* Calculate the destination of a branch/jump.  Return -1 if not a branch.  */
 
 static CORE_ADDR
-branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)
+branch_dest (struct frame_info *frame, int opcode, int instr,
+	     CORE_ADDR pc, CORE_ADDR safety)
 {
+  struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
   CORE_ADDR dest;
   int immediate;
   int absolute;
@@ -656,32 +658,26 @@ branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)
 
       if (ext_op == 16)		/* br conditional register */
 	{
-          dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
+          dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
 
 	  /* If we are about to return from a signal handler, dest is
 	     something like 0x3c90.  The current frame is a signal handler
 	     caller frame, upon completion of the sigreturn system call
 	     execution will return to the saved PC in the frame.  */
-	  if (dest < gdbarch_tdep (current_gdbarch)->text_segment_base)
-	    {
-	      struct frame_info *fi;
-
-	      fi = get_current_frame ();
-	      if (fi != NULL)
-		dest = read_memory_addr (get_frame_base (fi) + SIG_FRAME_PC_OFFSET,
-					 gdbarch_tdep (current_gdbarch)->wordsize);
-	    }
+	  if (dest < tdep->text_segment_base)
+	    dest = read_memory_addr (get_frame_base (frame) + SIG_FRAME_PC_OFFSET,
+				     tdep->wordsize);
 	}
 
       else if (ext_op == 528)	/* br cond to count reg */
 	{
-          dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum) & ~3;
+          dest = get_frame_register_unsigned (frame, tdep->ppc_ctr_regnum) & ~3;
 
 	  /* If we are about to execute a system call, dest is something
 	     like 0x22fc or 0x3b00.  Upon completion the system call
 	     will return to the address in the link register.  */
-	  if (dest < gdbarch_tdep (current_gdbarch)->text_segment_base)
-            dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
+	  if (dest < tdep->text_segment_base)
+            dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
 	}
       else
 	return -1;
@@ -690,7 +686,7 @@ branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)
     default:
       return -1;
     }
-  return (dest < gdbarch_tdep (current_gdbarch)->text_segment_base) ? safety : dest;
+  return (dest < tdep->text_segment_base) ? safety : dest;
 }
 
 
@@ -725,9 +721,9 @@ rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
    the sequence.  */
 
 static int 
-deal_with_atomic_sequence (struct regcache *regcache)
+deal_with_atomic_sequence (struct frame_info *frame)
 {
-  CORE_ADDR pc = read_pc ();
+  CORE_ADDR pc = get_frame_pc (frame);
   CORE_ADDR breaks[2] = {-1, -1};
   CORE_ADDR loc = pc;
   CORE_ADDR branch_bp; /* Breakpoint at branch instruction's destination.  */
@@ -762,7 +758,7 @@ deal_with_atomic_sequence (struct regcache *regcache)
                          to the standard single-step code.  */
           
           opcode = insn >> 26;
-          branch_bp = branch_dest (opcode, insn, pc, breaks[0]);
+          branch_bp = branch_dest (frame, opcode, insn, pc, breaks[0]);
           
           if (branch_bp != -1)
             {
@@ -807,7 +803,7 @@ deal_with_atomic_sequence (struct regcache *regcache)
 /* AIX does not support PT_STEP.  Simulate it.  */
 
 int
-rs6000_software_single_step (struct regcache *regcache)
+rs6000_software_single_step (struct frame_info *frame)
 {
   CORE_ADDR dummy;
   int breakp_sz;
@@ -817,16 +813,16 @@ rs6000_software_single_step (struct regcache *regcache)
   CORE_ADDR breaks[2];
   int opcode;
 
-  loc = read_pc ();
+  loc = get_frame_pc (frame);
 
   insn = read_memory_integer (loc, 4);
 
-  if (deal_with_atomic_sequence (regcache))
+  if (deal_with_atomic_sequence (frame))
     return 1;
   
   breaks[0] = loc + breakp_sz;
   opcode = insn >> 26;
-  breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
+  breaks[1] = branch_dest (frame, opcode, insn, loc, breaks[0]);
 
   /* Don't put two breakpoints on the same address. */
   if (breaks[1] == breaks[0])
@@ -961,13 +957,18 @@ store_param_on_stack_p (unsigned long op, int framep, int *r0_contains_arg)
 static int
 bl_to_blrl_insn_p (CORE_ADDR pc, int insn)
 {
-  const int opcode = 18;
-  const CORE_ADDR dest = branch_dest (opcode, insn, pc, -1);
+  CORE_ADDR dest;
+  int immediate;
+  int absolute;
   int dest_insn;
 
-  if (dest == -1)
-    return 0;  /* Should never happen, but just return zero to be safe.  */
-  
+  absolute = (int) ((insn >> 1) & 1);
+  immediate = ((insn & ~3) << 6) >> 6;
+  if (absolute)
+    dest = immediate;
+  else
+    dest = pc + immediate;
+
   dest_insn = read_memory_integer (dest, 4);
   if ((dest_insn & 0xfc00ffff) == 0x4c000021) /* blrl */
     return 1;
diff --git a/gdb/rs6000-tdep.h b/gdb/rs6000-tdep.h
index b1ab64b..d5dea59 100644
--- a/gdb/rs6000-tdep.h
+++ b/gdb/rs6000-tdep.h
@@ -21,7 +21,7 @@
 
 #include "defs.h"
 
-extern int rs6000_software_single_step (struct regcache *regcache);
+extern int rs6000_software_single_step (struct frame_info *frame);
 
 /* Hook in rs6000-tdep.c for determining the TOC address when
    calling functions in the inferior.  */
diff --git a/gdb/sparc-linux-tdep.c b/gdb/sparc-linux-tdep.c
index a6a8a27..a8df2e2 100644
--- a/gdb/sparc-linux-tdep.c
+++ b/gdb/sparc-linux-tdep.c
@@ -131,22 +131,18 @@ sparc32_linux_sigframe_init (const struct tramp_frame *self,
    address.  */
 
 static CORE_ADDR
-sparc32_linux_step_trap (unsigned long insn)
+sparc32_linux_step_trap (struct frame_info *frame, unsigned long insn)
 {
   if (insn == 0x91d02010)
     {
-      ULONGEST sc_num;
-
-      regcache_cooked_read_unsigned (current_regcache,
-				     SPARC_G1_REGNUM, &sc_num);
+      ULONGEST sc_num = get_frame_register_unsigned (frame, SPARC_G1_REGNUM);
 
       /* __NR_rt_sigreturn is 101 and __NR_sigreturn is 216  */
       if (sc_num == 101 || sc_num == 216)
 	{
 	  ULONGEST sp, pc_offset;
 
-	  regcache_cooked_read_unsigned (current_regcache,
-					 SPARC_SP_REGNUM, &sp);
+	  sp = get_frame_register_unsigned (frame, SPARC_SP_REGNUM);
 
 	  /* The kernel puts the sigreturn registers on the stack,
 	     and this is where the signal unwinding state is take from
diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c
index 0e2a496..bc93b05 100644
--- a/gdb/sparc-tdep.c
+++ b/gdb/sparc-tdep.c
@@ -170,18 +170,6 @@ sparc_fetch_wcookie (void)
 }
 
 
-/* Return the contents if register REGNUM as an address.  */
-
-CORE_ADDR
-sparc_address_from_register (int regnum)
-{
-  ULONGEST addr;
-
-  regcache_cooked_read_unsigned (current_regcache, regnum, &addr);
-  return addr;
-}
-
-
 /* The functions on this page are intended to be used to classify
    function arguments.  */
 
@@ -1249,7 +1237,7 @@ sparc32_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
    software single-step mechanism.  */
 
 static CORE_ADDR
-sparc_analyze_control_transfer (struct gdbarch *arch,
+sparc_analyze_control_transfer (struct frame_info *frame,
 				CORE_ADDR pc, CORE_ADDR *npc)
 {
   unsigned long insn = sparc_fetch_instruction (pc);
@@ -1291,7 +1279,7 @@ sparc_analyze_control_transfer (struct gdbarch *arch,
   else if (X_OP (insn) == 2 && X_OP3 (insn) == 0x3a)
     {
       /* Trap instruction (TRAP).  */
-      return gdbarch_tdep (arch)->step_trap (insn);
+      return gdbarch_tdep (get_frame_arch (frame))->step_trap (frame, insn);
     }
 
   /* FIXME: Handle DONE and RETRY instructions.  */
@@ -1324,25 +1312,25 @@ sparc_analyze_control_transfer (struct gdbarch *arch,
 }
 
 static CORE_ADDR
-sparc_step_trap (unsigned long insn)
+sparc_step_trap (struct frame_info *frame, unsigned long insn)
 {
   return 0;
 }
 
 int
-sparc_software_single_step (struct regcache *regcache)
+sparc_software_single_step (struct frame_info *frame)
 {
-  struct gdbarch *arch = current_gdbarch;
+  struct gdbarch *arch = get_frame_arch (frame);
   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
   CORE_ADDR npc, nnpc;
 
   CORE_ADDR pc, orig_npc;
 
-  pc = sparc_address_from_register (tdep->pc_regnum);
-  orig_npc = npc = sparc_address_from_register (tdep->npc_regnum);
+  pc = get_frame_register_unsigned (frame, tdep->pc_regnum);
+  orig_npc = npc = get_frame_register_unsigned (frame, tdep->npc_regnum);
 
   /* Analyze the instruction at PC.  */
-  nnpc = sparc_analyze_control_transfer (arch, pc, &npc);
+  nnpc = sparc_analyze_control_transfer (frame, pc, &npc);
   if (npc != 0)
     insert_single_step_breakpoint (npc);
 
diff --git a/gdb/sparc-tdep.h b/gdb/sparc-tdep.h
index 80385b4..1a4b941 100644
--- a/gdb/sparc-tdep.h
+++ b/gdb/sparc-tdep.h
@@ -67,7 +67,7 @@ struct gdbarch_tdep
   size_t plt_entry_size;
 
   /* Alternative location for trap return.  Used for single-stepping.  */
-  CORE_ADDR (*step_trap) (unsigned long insn);
+  CORE_ADDR (*step_trap) (struct frame_info *frame, unsigned long insn);
 };
 
 /* Register numbers of various important registers.  */
@@ -150,9 +150,6 @@ struct sparc_frame_cache
 /* Fetch the instruction at PC.  */
 extern unsigned long sparc_fetch_instruction (CORE_ADDR pc);
 
-/* Return the contents if register REGNUM as an address.  */
-extern CORE_ADDR sparc_address_from_register (int regnum);
-
 /* Fetch StackGhost Per-Process XOR cookie.  */
 extern ULONGEST sparc_fetch_wcookie (void);
 
@@ -167,7 +164,7 @@ extern struct sparc_frame_cache *
 
 
 
-extern int sparc_software_single_step (struct regcache *regcache);
+extern int sparc_software_single_step (struct frame_info *frame);
 
 extern void sparc_supply_rwindow (struct regcache *regcache,
 				  CORE_ADDR sp, int regnum);
@@ -205,7 +202,8 @@ extern const struct sparc_gregset sparc32nbsd_gregset;
 
 /* Return the address of a system call's alternative return
    address.  */
-extern CORE_ADDR sparcnbsd_step_trap (unsigned long insn);
+extern CORE_ADDR sparcnbsd_step_trap (struct frame_info *frame,
+				      unsigned long insn);
 
 extern void sparc32nbsd_elf_init_abi (struct gdbarch_info info,
 				      struct gdbarch *gdbarch);
diff --git a/gdb/sparc64-linux-tdep.c b/gdb/sparc64-linux-tdep.c
index 0c33c96..cbeeb21 100644
--- a/gdb/sparc64-linux-tdep.c
+++ b/gdb/sparc64-linux-tdep.c
@@ -106,14 +106,11 @@ sparc64_linux_sigframe_init (const struct tramp_frame *self,
    address.  */
 
 static CORE_ADDR
-sparc64_linux_step_trap (unsigned long insn)
+sparc64_linux_step_trap (struct frame_info *frame, unsigned long insn)
 {
   if (insn == 0x91d0206d)
     {
-      ULONGEST sp;
-
-      regcache_cooked_read_unsigned (current_regcache,
-				     SPARC_SP_REGNUM, &sp);
+      ULONGEST sp = get_frame_register_unsigned (frame, SPARC_SP_REGNUM);
       if (sp & 1)
 	sp += BIAS;
 
diff --git a/gdb/sparcnbsd-tdep.c b/gdb/sparcnbsd-tdep.c
index b8673b0..d9093b1 100644
--- a/gdb/sparcnbsd-tdep.c
+++ b/gdb/sparcnbsd-tdep.c
@@ -265,21 +265,18 @@ sparc32nbsd_sigtramp_frame_sniffer (struct frame_info *next_frame)
    address.  */
 
 CORE_ADDR
-sparcnbsd_step_trap (unsigned long insn)
+sparcnbsd_step_trap (struct frame_info *frame, unsigned long insn)
 {
   if ((X_I (insn) == 0 && X_RS1 (insn) == 0 && X_RS2 (insn) == 0)
       || (X_I (insn) == 1 && X_RS1 (insn) == 0 && (insn & 0x7f) == 0))
     {
       /* "New" system call.  */
-      ULONGEST number;
-
-      regcache_cooked_read_unsigned (current_regcache,
-				     SPARC_G1_REGNUM, &number);
+      ULONGEST number = get_frame_register_unsigned (frame, SPARC_G1_REGNUM);
 
       if (number & 0x400)
-	return sparc_address_from_register (SPARC_G2_REGNUM);
+	return get_frame_register_unsigned (frame, SPARC_G2_REGNUM);
       if (number & 0x800)
-	return sparc_address_from_register (SPARC_G7_REGNUM);
+	return get_frame_register_unsigned (frame, SPARC_G7_REGNUM);
     }
 
   return 0;
diff --git a/gdb/spu-tdep.c b/gdb/spu-tdep.c
index 8872084..b84dc80 100644
--- a/gdb/spu-tdep.c
+++ b/gdb/spu-tdep.c
@@ -1188,16 +1188,14 @@ spu_breakpoint_from_pc (CORE_ADDR * pcptr, int *lenptr)
 /* Software single-stepping support.  */
 
 int
-spu_software_single_step (struct regcache *regcache)
+spu_software_single_step (struct frame_info *frame)
 {
   CORE_ADDR pc, next_pc;
   unsigned int insn;
   int offset, reg;
   gdb_byte buf[4];
 
-  regcache_cooked_read (regcache, SPU_PC_REGNUM, buf);
-  /* Mask off interrupt enable bit.  */
-  pc = extract_unsigned_integer (buf, 4) & -4;
+  pc = get_frame_pc (frame);
 
   if (target_read_memory (pc, buf, 4))
     return 1;
@@ -1221,7 +1219,7 @@ spu_software_single_step (struct regcache *regcache)
 	target += pc;
       else if (reg != -1)
 	{
-	  regcache_cooked_read_part (regcache, reg, 0, 4, buf);
+	  get_frame_register_bytes (frame, reg, 0, 4, buf);
 	  target += extract_unsigned_integer (buf, 4) & -4;
 	}