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| author | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-09-30 04:39:13 +0000 |
|---|---|---|
| committer | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-10-14 05:21:39 +0000 |
| commit | cda4092e559c63285fc969613876812abfdf46d8 (patch) | |
| tree | 8fbcae43a0bc1c0ff056635573b5cc0702f50e67 /gdb | |
| parent | 3d9d92c22f6dd2a44f7d4e0d11c0671903e2387f (diff) | |
| download | gdb-cda4092e559c63285fc969613876812abfdf46d8.zip gdb-cda4092e559c63285fc969613876812abfdf46d8.tar.gz gdb-cda4092e559c63285fc969613876812abfdf46d8.tar.bz2 | |
RISC-V: Move standard hints before all instructions
Because all standard hints must be placed before corresponding instruction
for the disassembler, they may taint basic RVI instruction section.
This commit moves all standard hints before all basic RVI instructions
to improve maintainability.
opcodes/ChangeLog:
* riscv-opc.c (riscv_opcodes): Move all standard hints before all
standard instructions.
Diffstat (limited to 'gdb')
0 files changed, 0 insertions, 0 deletions