Refactoring/cleanup of nios2 opcodes and assembler code.

2014-10-23  Sandra Loosemore  <sandra@codesourcery.com>

	include/opcode/
	* nios2.h (enum iw_format_type): New.
	(struct nios2_opcode): Update comments.  Add size and format fields.
	(NIOS2_INSN_OPTARG): New.
	(REG_NORMAL, REG_CONTROL, REG_COPROCESSOR): New.
	(struct nios2_reg): Add regtype field.
	(GET_INSN_FIELD, SET_INSN_FIELD): Delete.
	(IW_A_LSB, IW_A_MSB, IW_A_SZ, IW_A_MASK): Delete.
	(IW_B_LSB, IW_B_MSB, IW_B_SZ, IW_B_MASK): Delete.
	(IW_C_LSB, IW_C_MSB, IW_C_SZ, IW_C_MASK): Delete.
	(IW_IMM16_LSB, IW_IMM16_MSB, IW_IMM16_SZ, IW_IMM16_MASK): Delete.
	(IW_IMM26_LSB, IW_IMM26_MSB, IW_IMM26_SZ, IW_IMM26_MASK): Delete.
	(IW_OP_LSB, IW_OP_MSB, IW_OP_SZ, IW_OP_MASK): Delete.
	(IW_OPX_LSB, IW_OPX_MSB, IW_OPX_SZ, IW_OPX_MASK): Delete.
	(IW_SHIFT_IMM5_LSB, IW_SHIFT_IMM5_MSB): Delete.
	(IW_SHIFT_IMM5_SZ, IW_SHIFT_IMM5_MASK): Delete.
	(IW_CONTROL_REGNUM_LSB, IW_CONTROL_REGNUM_MSB): Delete.
	(IW_CONTROL_REGNUM_SZ, IW_CONTROL_REGNUM_MASK): Delete.
	(OP_MASK_OP, OP_SH_OP): Delete.
	(OP_MASK_IOP, OP_SH_IOP): Delete.
	(OP_MASK_IRD, OP_SH_IRD): Delete.
	(OP_MASK_IRT, OP_SH_IRT): Delete.
	(OP_MASK_IRS, OP_SH_IRS): Delete.
	(OP_MASK_ROP, OP_SH_ROP): Delete.
	(OP_MASK_RRD, OP_SH_RRD): Delete.
	(OP_MASK_RRT, OP_SH_RRT): Delete.
	(OP_MASK_RRS, OP_SH_RRS): Delete.
	(OP_MASK_JOP, OP_SH_JOP): Delete.
	(OP_MASK_IMM26, OP_SH_IMM26): Delete.
	(OP_MASK_RCTL, OP_SH_RCTL): Delete.
	(OP_MASK_IMM5, OP_SH_IMM5): Delete.
	(OP_MASK_CACHE_OPX, OP_SH_CACHE_OPX): Delete.
	(OP_MASK_CACHE_RRS, OP_SH_CACHE_RRS): Delete.
	(OP_MASK_CUSTOM_A, OP_SH_CUSTOM_A): Delete.
	(OP_MASK_CUSTOM_B, OP_SH_CUSTOM_B): Delete.
	(OP_MASK_CUSTOM_C, OP_SH_CUSTOM_C): Delete.
	(OP_MASK_CUSTOM_N, OP_SH_CUSTOM_N): Delete.
	(OP_<insn>, OPX_<insn>, OP_MATCH_<insn>, OPX_MATCH_<insn>): Delete.
	(OP_MASK_<insn>, OP_MASK): Delete.
	(GET_IW_A, GET_IW_B, GET_IW_C, GET_IW_CONTROL_REGNUM): Delete.
	(GET_IW_IMM16, GET_IW_IMM26, GET_IW_OP, GET_IW_OPX): Delete.
	Include nios2r1.h to define new instruction opcode constants
	and accessors.
	(nios2_builtin_opcodes): Rename to nios2_r1_opcodes.
	(bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
	(bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
	(NUMOPCODES, NUMREGISTERS): Delete.
	* nios2r1.h: New file.

	opcodes/
	* nios2-opc.c (nios2_builtin_regs): Add regtype field initializers.
	(nios2_builtin_opcodes): Rename to nios2_r1_opcodes.  Use new
	MATCH_R1_<insn> and MASK_R1_<insn> macros in initializers.  Add
	size and format initializers.  Merge 'b' arguments into 'j'.
	(NIOS2_NUM_OPCODES): Adjust definition.
	(bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
	(nios2_opcodes): Adjust.
	(bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
	* nios2-dis.c (INSNLEN): Update comment.
	(nios2_hash_init, nios2_hash): Delete.
	(OPCODE_HASH_SIZE): New.
	(nios2_r1_extract_opcode): New.
	(nios2_disassembler_state): New.
	(nios2_r1_disassembler_state): New.
	(nios2_init_opcode_hash): Add state parameter.  Adjust to use it.
	(nios2_find_opcode_hash): Use state object.
	(bad_opcode): New.
	(nios2_print_insn_arg): Add op parameter.  Use it to access
	format.  Remove 'b' case.
	(nios2_disassemble): Remove special case for nop.  Remove
	hard-coded instruction size.

	gas/
	* config/tc-nios2.c (nios2_insn_infoS): Add constant_bits field.
	(nios2_arg_infoS, nios2_arg_hash, nios2_arg_lookup): Delete.
	(nios2_control_register_arg_p): Delete.
	(nios2_coproc_reg): Delete.
	(nios2_relax_frag): Remove hard-coded instruction size.
	(md_convert_frag): Use new insn accessor macros.
	(nios2_diagnose_overflow): Remove hard-coded instruction size.
	(md_apply_fix): Likewise.
	(bad_opcode): New.
	(nios2_parse_reg): New.
	(nios2_assemble_expression): Remove prev_reloc parameter.  Adjust
	uses and callers.
	(nios2_assemble_arg_c): New.
	(nios2_assemble_arg_d): New.
	(nios2_assemble_arg_s): New.
	(nios2_assemble_arg_t): New.
	(nios2_assemble_arg_i): New.
	(nios2_assemble_arg_u): New.
	(nios2_assemble_arg_o): New.
	(nios2_assemble_arg_j): New.
	(nios2_assemble_arg_l): New.
	(nios2_assemble_arg_m): New.
	(nios2_assemble_args): New.
	(nios2_assemble_args_dst): Delete.
	(nios2_assemble_args_tsi): Delete.
	(nios2_assemble_args_tsu): Delete.
	(nios2_assemble_args_sto): Delete.
	(nios2_assemble_args_o): Delete.
	(nios2_assemble_args_is): Delete.
	(nios2_assemble_args_m): Delete.
	(nios2_assemble_args_s): Delete.
	(nios2_assemble_args_tis): Delete.
	(nios2_assemble_args_dc): Delete.
	(nios2_assemble_args_cs): Delete.
	(nios2_assemble_args_ds): Delete.
	(nios2_assemble_args_ldst): Delete.
	(nios2_assemble_args_none): Delete.
	(nios2_assemble_args_dsj): Delete.
	(nios2_assemble_args_d): Delete.
	(nios2_assemble_args_b): Delete.
	(nios2_arg_info_structs): Delete.
	(NIOS2_NUM_ARGS): Delete.
	(nios2_consume_arg): Remove insn parameter.  Use new macros.
	Don't check register arguments here.  Remove 'b' case.
	(nios2_consume_separator): Move check for missing separators to...
	(nios2_parse_args): ...here.  Remove special case for optional
	arguments.
	(output_insn): Avoid using hard-coded insn size.
	(output_ubranch): Likewise.
	(output_cbranch): Likewise.
	(output_call): Use new macros.
	(output_addi): Likewise.
	(output_ori): Likewise.
	(output_xori): Likewise.
	(output_movia): Likewise.
	(md_begin): Remove nios2_arg_info_structs initialization.
	(md_assemble): Initialize constant_bits field.  Use
	nios2_parse_args instead of looking up parse function in hash table.

	gdb/
	* nios2-tdep.c (nios2_analyze_prologue): Use new instruction field
	accessors and constants from nios2 opcodes update.
	(nios2_get_next_pc): Likewise.

2 files changed, 67 insertions, 62 deletions

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 76957c4..370a7ad 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,9 @@
+2014-10-23  Sandra Loosemore  <sandra@codesourcery.com>
+
+	* nios2-tdep.c (nios2_analyze_prologue): Use new instruction field
+	accessors and constants from nios2 opcodes update.
+	(nios2_get_next_pc): Likewise.
+
 2014-10-19  Doug Evans  <xdje42@gmail.com>
 
 	* gdbthread.h (set_running): Fix comment.
diff --git a/gdb/nios2-tdep.c b/gdb/nios2-tdep.c
index 18a5913..69cefac 100644
--- a/gdb/nios2-tdep.c
+++ b/gdb/nios2-tdep.c
@@ -558,13 +558,13 @@ nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
 
       /* The following instructions can appear in the prologue.  */
 
-      if ((insn & 0x0001ffff) == 0x0001883a)
+      if ((insn & MASK_R1_ADD) == MATCH_R1_ADD)
 	{
 	  /* ADD   rc, ra, rb  (also used for MOV) */
 
-	  int ra = GET_IW_A (insn);
-	  int rb = GET_IW_B (insn);
-	  int rc = GET_IW_C (insn);
+	  int ra = GET_IW_R_A (insn);
+	  int rb = GET_IW_R_B (insn);
+	  int rc = GET_IW_R_C (insn);
 
 	  if (rc == NIOS2_SP_REGNUM
 	      && rb == 0
@@ -609,13 +609,13 @@ nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
 	  prologue_insn = 1;
 	}
 
-      else if ((insn & 0x0001ffff) == 0x0001983a)
+      else if ((insn & MASK_R1_SUB) == MATCH_R1_SUB)
 	{
 	  /* SUB   rc, ra, rb */
 
-	  int ra = GET_IW_A (insn);
-	  int rb = GET_IW_B (insn);
-	  int rc = GET_IW_C (insn);
+	  int ra = GET_IW_R_A (insn);
+	  int rb = GET_IW_R_B (insn);
+	  int rc = GET_IW_R_C (insn);
 
 	  if (rc != 0)
 	    {
@@ -627,12 +627,12 @@ nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
 	    }
 	}
 
-      else if ((insn & 0x0000003f) == 0x00000004)
+      else if ((insn & MASK_R1_ADDI) == MATCH_R1_ADDI)
 	{
 	  /* ADDI  rb, ra, immed   (also used for MOVI) */
-	  short immed = GET_IW_IMM16 (insn);
-	  int ra = GET_IW_A (insn);
-	  int rb = GET_IW_B (insn);
+	  short immed = GET_IW_I_IMM16 (insn);
+	  int ra = GET_IW_I_A (insn);
+	  int rb = GET_IW_I_B (insn);
 
 	  /* The first stack adjustment is part of the prologue.
 	     Any subsequent stack adjustments are either down to
@@ -651,12 +651,12 @@ nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
 	  prologue_insn = 1;
 	}
 
-      else if ((insn & 0x0000003f) == 0x00000034)
+      else if ((insn & MASK_R1_ORHI) == MATCH_R1_ORHI)
 	{
 	  /* ORHI  rb, ra, immed   (also used for MOVHI) */
-	  unsigned int immed = GET_IW_IMM16 (insn);
-	  int ra = GET_IW_A (insn);
-	  int rb = GET_IW_B (insn);
+	  unsigned int immed = GET_IW_I_IMM16 (insn);
+	  int ra = GET_IW_I_A (insn);
+	  int rb = GET_IW_I_B (insn);
 
 	  if (rb != 0)
 	    {
@@ -665,14 +665,14 @@ nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
 	    }
 	}
 
-      else if ((insn & IW_OP_MASK) == OP_STW
-	       || (insn & IW_OP_MASK) == OP_STWIO)
+      else if ((insn & MASK_R1_STW) == MATCH_R1_STW
+	       || (insn & MASK_R1_STWIO) == MATCH_R1_STWIO)
         {
 	  /* STW rb, immediate(ra) */
 
-	  short immed16 = GET_IW_IMM16 (insn);
-	  int ra = GET_IW_A (insn);
-	  int rb = GET_IW_B (insn);
+	  short immed16 = GET_IW_I_IMM16 (insn);
+	  int ra = GET_IW_I_A (insn);
+	  int rb = GET_IW_I_B (insn);
 
 	  /* Are we storing the original value of a register?
 	     For exception handlers the value of EA-4 (return
@@ -693,8 +693,7 @@ nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
 		    {
 		      /* Save off callee saved registers.  */
 		      cache->reg_saved[orig].basereg = value[ra].reg;
-		      cache->reg_saved[orig].addr
-			= value[ra].offset + GET_IW_IMM16 (insn);
+		      cache->reg_saved[orig].addr = value[ra].offset + immed16;
 		    }
 
 		  prologue_insn = 1;
@@ -709,11 +708,11 @@ nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
 	    within_prologue = 0;
         }
 
-      else if ((insn & 0xffc1f83f) == 0x0001303a)
+      else if ((insn & MASK_R1_RDCTL) == MATCH_R1_RDCTL)
 	{
 	  /* RDCTL rC, ctlN */
-	  int rc = GET_IW_C (insn);
-	  int n = GET_IW_CONTROL_REGNUM (insn);
+	  int rc = GET_IW_R_C (insn);
+	  int n = GET_IW_R_A (insn);
 
 	  if (rc != 0)
 	    {
@@ -724,7 +723,7 @@ nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
 	  prologue_insn = 1;
         }
 
-      else if ((insn & 0x0000003f) == 0
+      else if ((insn & MASK_R1_CALL) == MATCH_R1_CALL
 	       && value[8].reg == NIOS2_RA_REGNUM
 	       && value[8].offset == 0
 	       && value[NIOS2_SP_REGNUM].reg == NIOS2_SP_REGNUM
@@ -779,24 +778,24 @@ nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
 	 adjustment as terminating the prologue (see above).  */
       else
 	{
-	  switch (GET_IW_OP (insn))
+	  switch (GET_IW_R1_OP (insn))
 	    {
-	    case OP_BEQ:
-	    case OP_BGE:
-	    case OP_BGEU:
-	    case OP_BLT:
-	    case OP_BLTU:
-	    case OP_BNE:
-	    case OP_BR:
-	    case OP_CALL:
+	    case R1_OP_BEQ:
+	    case R1_OP_BGE:
+	    case R1_OP_BGEU:
+	    case R1_OP_BLT:
+	    case R1_OP_BLTU:
+	    case R1_OP_BNE:
+	    case R1_OP_BR:
+	    case R1_OP_CALL:
 	      within_prologue = 0;
 	      break;
-	    case OP_OPX:
-	      if (GET_IW_OPX (insn) == OPX_RET
-		  || GET_IW_OPX (insn) == OPX_ERET
-		  || GET_IW_OPX (insn) == OPX_BRET
-		  || GET_IW_OPX (insn) == OPX_CALLR
-		  || GET_IW_OPX (insn) == OPX_JMP)
+	    case R1_OP_OPX:
+	      if (GET_IW_R_OPX (insn) == R1_OPX_RET
+		  || GET_IW_R_OPX (insn) == R1_OPX_ERET
+		  || GET_IW_R_OPX (insn) == R1_OPX_BRET
+		  || GET_IW_R_OPX (insn) == R1_OPX_CALLR
+		  || GET_IW_R_OPX (insn) == R1_OPX_JMP)
 		within_prologue = 0;
 	      break;
 	    default:
@@ -1372,65 +1371,65 @@ nios2_get_next_pc (struct frame_info *frame, CORE_ADDR pc)
   inst = nios2_fetch_instruction (gdbarch, pc);
   pc += NIOS2_OPCODE_SIZE;
 
-  imm16 = (short) GET_IW_IMM16 (inst);
-  ra = GET_IW_A (inst);
-  rb = GET_IW_B (inst);
+  imm16 = (short) GET_IW_I_IMM16 (inst);
+  ra = GET_IW_I_A (inst);
+  rb = GET_IW_I_B (inst);
   ras = get_frame_register_signed (frame, ra);
   rbs = get_frame_register_signed (frame, rb);
   rau = get_frame_register_unsigned (frame, ra);
   rbu = get_frame_register_unsigned (frame, rb);
 
-  switch (GET_IW_OP (inst))
+  switch (GET_IW_R1_OP (inst))
     {
-    case OP_BEQ:
+    case R1_OP_BEQ:
       if (ras == rbs)
 	pc += imm16;
       break;
 
-    case OP_BGE:
+    case R1_OP_BGE:
       if (ras >= rbs)
         pc += imm16;
       break;
 
-    case OP_BGEU:
+    case R1_OP_BGEU:
       if (rau >= rbu)
         pc += imm16;
       break;
 
-    case OP_BLT:
+    case R1_OP_BLT:
       if (ras < rbs)
         pc += imm16;
       break;
 
-    case OP_BLTU:
+    case R1_OP_BLTU:
       if (rau < rbu)
         pc += imm16;
       break;
 
-    case OP_BNE:
+    case R1_OP_BNE:
       if (ras != rbs)
         pc += imm16;
       break;
 
-    case OP_BR:
+    case R1_OP_BR:
       pc += imm16;
       break;
 
-    case OP_JMPI:
-    case OP_CALL:
-      pc = (pc & 0xf0000000) | (GET_IW_IMM26 (inst) << 2);
+    case R1_OP_JMPI:
+    case R1_OP_CALL:
+      pc = (pc & 0xf0000000) | (GET_IW_J_IMM26 (inst) << 2);
       break;
 
-    case OP_OPX:
-      switch (GET_IW_OPX (inst))
+    case R1_OP_OPX:
+      switch (GET_IW_R_OPX (inst))
 	{
-	case OPX_JMP:
-	case OPX_CALLR:
-	case OPX_RET:
+	case R1_OPX_JMP:
+	case R1_OPX_CALLR:
+	case R1_OPX_RET:
 	  pc = ras;
 	  break;
 
-	case OPX_TRAP:
+	case R1_OPX_TRAP:
 	  if (tdep->syscall_next_pc != NULL)
 	    return tdep->syscall_next_pc (frame);