diff options
| author | Jim Wilson <jimw@sifive.com> | 2018-07-17 09:42:23 -0700 |
|---|---|---|
| committer | Jim Wilson <jimw@sifive.com> | 2018-07-17 09:42:23 -0700 |
| commit | ce73f310150418a9a1625ab60a527d959096a9e2 (patch) | |
| tree | 68ab4c266eda7136cc390debbfa9298dd25ef414 /gdb | |
| parent | 056dec39ed11e0027ae399018c3fef3a719718b9 (diff) | |
| download | gdb-ce73f310150418a9a1625ab60a527d959096a9e2.zip gdb-ce73f310150418a9a1625ab60a527d959096a9e2.tar.gz gdb-ce73f310150418a9a1625ab60a527d959096a9e2.tar.bz2 | |
RISC-V: Correct legacy misa register number.
gdb/
* riscv-tdep.h (DECLARE_CSR): Use RISCV_FIRST_CSR_REGNUM instead of
RISCV_LAST_FP_REGNUM + 1.
(RSICV_CSR_LEGACY_MISA_REGNUM): Add RISCV_FIRST_CSR_REGNUM.
Diffstat (limited to 'gdb')
| -rw-r--r-- | gdb/ChangeLog | 6 | ||||
| -rw-r--r-- | gdb/riscv-tdep.h | 4 |
2 files changed, 8 insertions, 2 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 6f5487c..ecf360f 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,9 @@ +2018-07-17 Jim Wilson <jimw@sifive.com> + + * riscv-tdep.h (DECLARE_CSR): Use RISCV_FIRST_CSR_REGNUM instead of + RISCV_LAST_FP_REGNUM + 1. + (RSICV_CSR_LEGACY_MISA_REGNUM): Add RISCV_FIRST_CSR_REGNUM. + 2018-07-17 Tom Tromey <tom@tromey.com> * configure.ac: Remove --disable-gdbcli. diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h index ab5e278..4fc0597 100644 --- a/gdb/riscv-tdep.h +++ b/gdb/riscv-tdep.h @@ -39,11 +39,11 @@ enum RISCV_LAST_FP_REGNUM = 64, /* Last Floating Point Register */ RISCV_FIRST_CSR_REGNUM = 65, /* First CSR */ -#define DECLARE_CSR(name, num) RISCV_ ## num ## _REGNUM = RISCV_LAST_FP_REGNUM + 1 + num, +#define DECLARE_CSR(name, num) RISCV_ ## num ## _REGNUM = RISCV_FIRST_CSR_REGNUM + num, #include "opcode/riscv-opc.h" #undef DECLARE_CSR RISCV_LAST_CSR_REGNUM = 4160, - RISCV_CSR_LEGACY_MISA_REGNUM = 0xf10, + RISCV_CSR_LEGACY_MISA_REGNUM = 0xf10 + RISCV_FIRST_CSR_REGNUM, RISCV_PRIV_REGNUM = 4161, |