Don't use print_insn_XXX in GDB

This is a follow-up to

  [PATCH 0/6] Unify the disassembler selection in gdb and objdump
  https://sourceware.org/ml/binutils/2017-05/msg00192.html

that is, opcodes is able to select the right disassembler, so gdb
doesn't have to select them.  Instead, gdb can just use
default_print_insn.  As a result, these print_insn_XXX are not used
out of opcodes, so this patch also moves their declarations from
include/dis-asm.h to opcodes/disassemble.h.  With this change,
GDB doesn't use any print_insn_XXX directly any more.

gdb:

2017-06-14  Yao Qi  <yao.qi@linaro.org>

	* aarch64-tdep.c (aarch64_gdb_print_insn): Call
	default_print_insn instead of print_insn_aarch64.
	* arm-tdep.c (gdb_print_insn_arm): Call
	default_print_insn instead of print_insn_big_arm
	and print_insn_little_arm.
	* i386-tdep.c (i386_print_insn): Call default_print_insn
	instead of print_insn_i386.
	* ia64-tdep.c (ia64_print_insn): Call
	default_print_insn instead of print_insn_ia64.
	* mips-tdep.c (gdb_print_insn_mips): Call
	default_print_insn instead of print_insn_big_mips
	and print_insn_little_mips.
	* spu-tdep.c (gdb_print_insn_spu): Call default_print_insn
	instead of print_insn_spu.

include:

2017-06-14  Yao Qi  <yao.qi@linaro.org>

	* dis-asm.h (print_insn_aarch64): Move it to opcodes/disassemble.h.
	(print_insn_big_arm, print_insn_big_mips): Likewise.
	(print_insn_i386, print_insn_ia64): Likewise.
	(print_insn_little_arm, print_insn_little_mips): Likewise.
	(print_insn_spu): Likewise.

opcodes:

2017-06-14  Yao Qi  <yao.qi@linaro.org>

	* aarch64-dis.c: Include disassemble.h instead of dis-asm.h.
	* arm-dis.c: Likewise.
	* ia64-dis.c: Likewise.
	* mips-dis.c: Likewise.
	* spu-dis.c: Likewise.
	* disassemble.h (print_insn_aarch64): New declaration, moved from
	include/dis-asm.h.
	(print_insn_big_arm, print_insn_big_mips): Likewise.
	(print_insn_i386, print_insn_ia64): Likewise.
	(print_insn_little_arm, print_insn_little_mips): Likewise.

7 files changed, 23 insertions, 13 deletions

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 07862c8..67063f9 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,20 @@
+2017-06-14  Yao Qi  <yao.qi@linaro.org>
+
+	* aarch64-tdep.c (aarch64_gdb_print_insn): Call
+	default_print_insn instead of print_insn_aarch64.
+	* arm-tdep.c (gdb_print_insn_arm): Call
+	default_print_insn instead of print_insn_big_arm
+	and print_insn_little_arm.
+	* i386-tdep.c (i386_print_insn): Call default_print_insn
+	instead of print_insn_i386.
+	* ia64-tdep.c (ia64_print_insn): Call
+	default_print_insn instead of print_insn_ia64.
+	* mips-tdep.c (gdb_print_insn_mips): Call
+	default_print_insn instead of print_insn_big_mips
+	and print_insn_little_mips.
+	* spu-tdep.c (gdb_print_insn_spu): Call default_print_insn
+	instead of print_insn_spu.
+
 2017-06-14  Pedro Alves  <palves@redhat.com>
 
 	* ada-lang.c: Include "common/byte-vector.h".
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index a5db6ed..75bb00f 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -1777,7 +1777,7 @@ static int
 aarch64_gdb_print_insn (bfd_vma memaddr, disassemble_info *info)
 {
   info->symbols = NULL;
-  return print_insn_aarch64 (memaddr, info);
+  return default_print_insn (memaddr, info);
 }
 
 /* AArch64 BRK software debug mode instruction.
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 691fae7..9943324 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -7773,10 +7773,7 @@ gdb_print_insn_arm (bfd_vma memaddr, disassemble_info *info)
   else
     info->symbols = NULL;
 
-  if (info->endian == BFD_ENDIAN_BIG)
-    return print_insn_big_arm (memaddr, info);
-  else
-    return print_insn_little_arm (memaddr, info);
+  return default_print_insn (memaddr, info);
 }
 
 /* The following define instruction sequences that will cause ARM
diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index fe68486..bd728f0 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -4011,7 +4011,7 @@ i386_print_insn (bfd_vma pc, struct disassemble_info *info)
 
   info->disassembler_options = disassembly_flavor;
 
-  return print_insn_i386 (pc, info);
+  return default_print_insn (pc, info);
 }
 
 
diff --git a/gdb/ia64-tdep.c b/gdb/ia64-tdep.c
index d396fb8..5a16db1 100644
--- a/gdb/ia64-tdep.c
+++ b/gdb/ia64-tdep.c
@@ -3926,7 +3926,7 @@ static int
 ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
 {
   info->bytes_per_line = SLOT_MULTIPLIER;
-  return print_insn_ia64 (memaddr, info);
+  return default_print_insn (memaddr, info);
 }
 
 /* The default "size_of_register_frame" gdbarch_tdep routine for ia64.  */
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index dcd9ef2..3ff2dab 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -7019,11 +7019,7 @@ gdb_print_insn_mips (bfd_vma memaddr, struct disassemble_info *info)
        register naming conventions specified by the user.  */
     info->disassembler_options = "gpr-names=32";
 
-  /* Call the appropriate disassembler based on the target endian-ness.  */
-  if (info->endian == BFD_ENDIAN_BIG)
-    return print_insn_big_mips (memaddr, info);
-  else
-    return print_insn_little_mips (memaddr, info);
+  return default_print_insn (memaddr, info);
 }
 
 static int
diff --git a/gdb/spu-tdep.c b/gdb/spu-tdep.c
index 08ab194..1ab9a9c 100644
--- a/gdb/spu-tdep.c
+++ b/gdb/spu-tdep.c
@@ -1721,7 +1721,7 @@ gdb_print_insn_spu (bfd_vma memaddr, struct disassemble_info *info)
   memcpy (&spu_info, info, sizeof (*info));
   spu_info.id = SPUADDR_SPU (memaddr);
   spu_info.print_address_func = spu_dis_asm_print_address;
-  return print_insn_spu (memaddr, &spu_info);
+  return default_print_insn (memaddr, &spu_info);
 }