diff options
author | Andrew Cagney <cagney@redhat.com> | 2004-10-30 22:36:34 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 2004-10-30 22:36:34 +0000 |
commit | 613e114ff9d8c0f2bbe5177ef94f702123bb8885 (patch) | |
tree | 0430c3bc647f9b87f9b1b8867b9f74b36dfd8db1 /gdb | |
parent | d37cca3d684da261b7982e9b854d532048a355e2 (diff) | |
download | gdb-613e114ff9d8c0f2bbe5177ef94f702123bb8885.zip gdb-613e114ff9d8c0f2bbe5177ef94f702123bb8885.tar.gz gdb-613e114ff9d8c0f2bbe5177ef94f702123bb8885.tar.bz2 |
2004-10-30 Andrew Cagney <cagney@gnu.org>
* mips-tdep.h: Add comments on registers.
(MIPS_UNUSED_REGNUM): Define.
* config/mips/tm-mips.h (ZERO_REGNUM, UNUSED_REGNUM)
(T9_REGNUM, V0_REGNUM, A0_REGNUM): Delete.
* irix5-nat.c, mipsv4-nat.c, mips-linux-tdep.c: Update.
* mips-linux-nat.c, remote-mips.c: Update.
Diffstat (limited to 'gdb')
-rw-r--r-- | gdb/ChangeLog | 7 | ||||
-rw-r--r-- | gdb/config/mips/tm-mips.h | 12 | ||||
-rw-r--r-- | gdb/irix5-nat.c | 2 | ||||
-rw-r--r-- | gdb/mips-linux-nat.c | 8 | ||||
-rw-r--r-- | gdb/mips-linux-tdep.c | 8 | ||||
-rw-r--r-- | gdb/mips-tdep.c | 4 | ||||
-rw-r--r-- | gdb/mips-tdep.h | 18 | ||||
-rw-r--r-- | gdb/mipsv4-nat.c | 4 | ||||
-rw-r--r-- | gdb/remote-mips.c | 2 |
9 files changed, 32 insertions, 33 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 4189edc..e4d4c33 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,12 @@ 2004-10-30 Andrew Cagney <cagney@gnu.org> + * mips-tdep.h: Add comments on registers. + (MIPS_UNUSED_REGNUM): Define. + * config/mips/tm-mips.h (ZERO_REGNUM, UNUSED_REGNUM) + (T9_REGNUM, V0_REGNUM, A0_REGNUM): Delete. + * irix5-nat.c, mipsv4-nat.c, mips-linux-tdep.c: Update. + * mips-linux-nat.c, remote-mips.c: Update. + * config/mips/tm-mips.h (t_insn): Delete. * mips-tdep.c (mips_fetch_instruction, mips_skip_trampoline_code): Replace t_insn with ULONGEST. diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h index 3fce4fc..678e3f0 100644 --- a/gdb/config/mips/tm-mips.h +++ b/gdb/config/mips/tm-mips.h @@ -43,20 +43,8 @@ extern int mips_step_skips_delay (CORE_ADDR); #define STEP_SKIPS_DELAY_P (1) #define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc)) -/* Register numbers of various important registers. - Note that some of these values are "real" register numbers, - and correspond to the general registers of the machine, - and some are "phony" register numbers which are too large - to be actual register numbers as far as the user is concerned - but do serve to get the desired values when passed to read_register. */ - -#define ZERO_REGNUM 0 /* read-only register, always 0 */ -#define V0_REGNUM 2 /* Function integer return value */ -#define A0_REGNUM 4 /* Loc of first arg during a subr call */ -#define T9_REGNUM 25 /* Contains address of callee in PIC */ #define RA_REGNUM 31 /* Contains return address value */ #define PS_REGNUM 32 /* Contains processor status */ -#define UNUSED_REGNUM 73 /* Never used, FIXME */ #define FIRST_EMBED_REGNUM 74 /* First CP0 register for embedded use */ #define PRID_REGNUM 89 /* Processor ID */ #define LAST_EMBED_REGNUM 89 /* Last one */ diff --git a/gdb/irix5-nat.c b/gdb/irix5-nat.c index 5cf6055..182a05a 100644 --- a/gdb/irix5-nat.c +++ b/gdb/irix5-nat.c @@ -182,7 +182,7 @@ get_longjmp_target (CORE_ADDR *pc) CORE_ADDR jb_addr; buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT); - jb_addr = read_register (A0_REGNUM); + jb_addr = read_register (MIPS_A0_REGNUM); if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf, TARGET_PTR_BIT / TARGET_CHAR_BIT)) diff --git a/gdb/mips-linux-nat.c b/gdb/mips-linux-nat.c index f5071ad..6cd9e87 100644 --- a/gdb/mips-linux-nat.c +++ b/gdb/mips-linux-nat.c @@ -24,13 +24,13 @@ /* Pseudo registers can not be read. ptrace does not provide a way to read (or set) PS_REGNUM, and there's no point in reading or setting - ZERO_REGNUM. We also can not set BADVADDR, CAUSE, or FCRIR via - ptrace(). */ + MIPS_ZERO_REGNUM. We also can not set BADVADDR, CAUSE, or FCRIR + via ptrace(). */ int mips_linux_cannot_fetch_register (int regno) { - if (regno > ZERO_REGNUM && regno < ZERO_REGNUM + 32) + if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32) return 0; else if (regno >= mips_regnum (current_gdbarch)->fp0 && regno <= mips_regnum (current_gdbarch)->fp0 + 32) @@ -50,7 +50,7 @@ mips_linux_cannot_fetch_register (int regno) int mips_linux_cannot_store_register (int regno) { - if (regno > ZERO_REGNUM && regno < ZERO_REGNUM + 32) + if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32) return 0; else if (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 32) return 0; diff --git a/gdb/mips-linux-tdep.c b/gdb/mips-linux-tdep.c index 4b48905..faaa836 100644 --- a/gdb/mips-linux-tdep.c +++ b/gdb/mips-linux-tdep.c @@ -76,7 +76,7 @@ mips_linux_get_longjmp_target (CORE_ADDR *pc) CORE_ADDR jb_addr; char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT]; - jb_addr = read_register (A0_REGNUM); + jb_addr = read_register (MIPS_A0_REGNUM); if (target_read_memory (jb_addr + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE, @@ -129,7 +129,7 @@ supply_gregset (elf_gregset_t *gregsetp) (char *)(regp + EF_CP0_CAUSE)); /* Fill inaccessible registers with zero. */ - regcache_raw_supply (current_regcache, UNUSED_REGNUM, zerobuf); + regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf); for (regi = FIRST_EMBED_REGNUM; regi < LAST_EMBED_REGNUM; regi++) regcache_raw_supply (current_regcache, regi, zerobuf); } @@ -367,7 +367,7 @@ mips64_linux_get_longjmp_target (CORE_ADDR *pc) void *buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT); int element_size = TARGET_PTR_BIT == 32 ? 4 : 8; - jb_addr = read_register (A0_REGNUM); + jb_addr = read_register (MIPS_A0_REGNUM); if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size, buf, TARGET_PTR_BIT / TARGET_CHAR_BIT)) @@ -408,7 +408,7 @@ mips64_supply_gregset (mips64_elf_gregset_t *gregsetp) (char *)(regp + MIPS64_EF_CP0_CAUSE)); /* Fill inaccessible registers with zero. */ - regcache_raw_supply (current_regcache, UNUSED_REGNUM, zerobuf); + regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf); for (regi = FIRST_EMBED_REGNUM; regi < LAST_EMBED_REGNUM; regi++) regcache_raw_supply (current_regcache, regi, zerobuf); } diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 8ec9645..b27bc20 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -5375,10 +5375,6 @@ mips_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file) "mips_dump_tdep: TRACE_SET # %s\n", XSTRING (TRACE_SET (X, STATE))); #endif -#ifdef UNUSED_REGNUM - fprintf_unfiltered (file, - "mips_dump_tdep: UNUSED_REGNUM = %d\n", UNUSED_REGNUM); -#endif fprintf_unfiltered (file, "mips_dump_tdep: VM_MIN_ADDRESS = %ld\n", (long) VM_MIN_ADDRESS); diff --git a/gdb/mips-tdep.h b/gdb/mips-tdep.h index 404ec7d..9dac4c2 100644 --- a/gdb/mips-tdep.h +++ b/gdb/mips-tdep.h @@ -61,13 +61,20 @@ struct mips_regnum }; extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch); +/* Register numbers of various important registers. Note that some of + these values are "real" register numbers, and correspond to the + general registers of the machine, and some are "phony" register + numbers which are too large to be actual register numbers as far as + the user is concerned but do serve to get the desired values when + passed to read_register. */ + enum { - MIPS_ZERO_REGNUM = 0, + MIPS_ZERO_REGNUM = 0, /* Read-only register, always 0. */ MIPS_AT_REGNUM = 1, - MIPS_V0_REGNUM = 2, - MIPS_A0_REGNUM = 4, - MIPS_T9_REGNUM = 25, + MIPS_V0_REGNUM = 2, /* Function integer return value. */ + MIPS_A0_REGNUM = 4, /* Loc of first arg during a subr call */ + MIPS_T9_REGNUM = 25, /* Contains address of callee in PIC. */ MIPS_SP_REGNUM = 29, MIPS_RA_REGNUM = 31, MIPS_EMBED_LO_REGNUM = 33, @@ -75,7 +82,8 @@ enum MIPS_EMBED_BADVADDR_REGNUM = 35, MIPS_EMBED_CAUSE_REGNUM = 36, MIPS_EMBED_PC_REGNUM = 37, - MIPS_EMBED_FP0_REGNUM = 38 + MIPS_EMBED_FP0_REGNUM = 38, + MIPS_UNUSED_REGNUM = 73 /* Never used, FIXME */ }; /* Defined in mips-tdep.c and used in remote-mips.c */ diff --git a/gdb/mipsv4-nat.c b/gdb/mipsv4-nat.c index 53e286a..75956c1 100644 --- a/gdb/mipsv4-nat.c +++ b/gdb/mipsv4-nat.c @@ -68,7 +68,7 @@ supply_gregset (gregset_t *gregsetp) mips_regnum (current_gdbarch)->badvaddr, zerobuf); regcache_raw_supply (current_regcache, DEPRECATED_FP_REGNUM, zerobuf); - regcache_raw_supply (current_regcache, UNUSED_REGNUM, zerobuf); + regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf); for (regi = FIRST_EMBED_REGNUM; regi <= LAST_EMBED_REGNUM; regi++) regcache_raw_supply (current_regcache, regi, zerobuf); } @@ -161,7 +161,7 @@ get_longjmp_target (CORE_ADDR *pc) CORE_ADDR jb_addr; buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT); - jb_addr = read_register (A0_REGNUM); + jb_addr = read_register (MIPS_A0_REGNUM); if (target_read_memory (jb_addr + _JB_PC * JB_ELEMENT_SIZE, buf, TARGET_PTR_BIT / TARGET_CHAR_BIT)) diff --git a/gdb/remote-mips.c b/gdb/remote-mips.c index 2230330..2b40066 100644 --- a/gdb/remote-mips.c +++ b/gdb/remote-mips.c @@ -1905,7 +1905,7 @@ mips_fetch_registers (int regno) return; } - if (regno == DEPRECATED_FP_REGNUM || regno == ZERO_REGNUM) + if (regno == DEPRECATED_FP_REGNUM || regno == MIPS_ZERO_REGNUM) /* DEPRECATED_FP_REGNUM on the mips is a hack which is just supposed to read zero (see also mips-nat.c). */ val = 0; |