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author | Marcus Shawcroft <mshawcroft@sourceware.org> | 2013-02-05 13:59:08 +0000 |
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committer | Marcus Shawcroft <mshawcroft@sourceware.org> | 2013-02-05 13:59:08 +0000 |
commit | 430ed3f014e02cc8a6f608a099e017c857fcbacd (patch) | |
tree | 7901cca3684ff93664ebb602a2bd2f84571245d3 /gdb | |
parent | 37ba9f93b2e0216ec85684f8b8f838633ed657c1 (diff) | |
download | gdb-430ed3f014e02cc8a6f608a099e017c857fcbacd.zip gdb-430ed3f014e02cc8a6f608a099e017c857fcbacd.tar.gz gdb-430ed3f014e02cc8a6f608a099e017c857fcbacd.tar.bz2 |
Adding AArch64 documentation.
2013-02-05 Yufeng Zhang <yufeng.zhang@arm.com>
* gdb.texinfo (AArch64 Features): New section; document
org.gnu.gdb.aarch64.core and org.gnu.gdb.aarch64.fpu.
(Architectures): Add new AArch64 section to document AArch64
architecture specific commands.
(ABI): Add description of the new OS ABI "Newlib" and its influence
on the longjmp handling.
Diffstat (limited to 'gdb')
-rw-r--r-- | gdb/doc/ChangeLog | 9 | ||||
-rw-r--r-- | gdb/doc/gdb.texinfo | 38 |
2 files changed, 47 insertions, 0 deletions
diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog index 62e3590..92397eb 100644 --- a/gdb/doc/ChangeLog +++ b/gdb/doc/ChangeLog @@ -1,3 +1,12 @@ +2013-02-05 Yufeng Zhang <yufeng.zhang@arm.com> + + * gdb.texinfo (AArch64 Features): New section; document + org.gnu.gdb.aarch64.core and org.gnu.gdb.aarch64.fpu. + (Architectures): Add new AArch64 section to document AArch64 + architecture specific commands. + (ABI): Add description of the new OS ABI "Newlib" and its influence + on the longjmp handling. + 2013-02-03 Eldar Gaynetdinov <hal9000ed2k@gmail.com> Jan Kratochvil <jan.kratochvil@redhat.com> diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index a448c97..bde42071 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -20693,6 +20693,7 @@ This section describes characteristics of architectures that affect all uses of @value{GDBN} with the architecture, both native and cross. @menu +* AArch64:: * i386:: * Alpha:: * MIPS:: @@ -20701,6 +20702,24 @@ all uses of @value{GDBN} with the architecture, both native and cross. * PowerPC:: @end menu +@node AArch64 +@subsection AArch64 +@cindex AArch64 support + +When @value{GDBN} is debugging the AArch64 architecture, it provides the +following special commands: + +@table @code +@item set debug aarch64 +@kindex set debug aarch64 +This command determines whether AArch64 architecture-specific debugging +messages are to be displayed. + +@item show debug aarch64 +Show whether AArch64 debugging messages are displayed. + +@end table + @node i386 @subsection x86 Architecture-specific Issues @@ -21330,6 +21349,7 @@ current ABI. @cindex OS ABI @kindex set osabi @kindex show osabi +@cindex Newlib OS ABI and its influence on the longjmp handling One @value{GDBN} configuration can debug binaries for multiple operating system targets, either via remote debugging or native emulation. @@ -21340,6 +21360,11 @@ an alternate C library (e.g.@: @sc{uClibc} for @sc{gnu}/Linux) which does not have the same identifying marks that the standard C library for your platform provides. +When @value{GDBN} is debugging the AArch64 architecture, it provides a +``Newlib'' OS ABI. This is useful for handling @code{setjmp} and +@code{longjmp} when debugging binaries that use the @sc{newlib} C library. +The ``Newlib'' OS ABI can be selected by @code{set osabi Newlib}. + @table @code @item show osabi Show the OS ABI currently in use. @@ -40770,6 +40795,7 @@ of recognizing standard features, but @value{GDBN} will only display registers using the capitalization used in the description. @menu +* AArch64 Features:: * ARM Features:: * i386 Features:: * MIPS Features:: @@ -40779,6 +40805,18 @@ registers using the capitalization used in the description. @end menu +@node AArch64 Features +@subsection AArch64 Features +@cindex target descriptions, AArch64 features + +The @samp{org.gnu.gdb.aarch64.core} feature is required for AArch64 +targets. It should contain registers @samp{x0} through @samp{x30}, +@samp{sp}, @samp{pc}, and @samp{cpsr}. + +The @samp{org.gnu.gdb.aarch64.fpu} feature is optional. If present, +it should contain registers @samp{v0} through @samp{v31}, @samp{fpsr}, +and @samp{fpcr}. + @node ARM Features @subsection ARM Features @cindex target descriptions, ARM features |