* doc/gdb.texinfo (PowerPC): Mention Extended FPR's for POWER7.

	(PowerPC features): Mention feature set for VSX registers.

	* gdbserver/Makefile.in: Add required vsx dependencies.

	* gdbserver/linux-ppc-low: Define PPC_FEATURE_HAS_VSX.
	Declare init_registers_powerpc_vsx32l.
	Declare init_registers_powerpc_vsx64l.
	Define PTRACE_GETVSXREGS and PTRACE_SETVSXREGS.
	(ppc_arch_setup): Check for VSX in hwcap.
	(ppc_fill_vsxregset): New function.
	(ppc_store_vsxregset): New function.
	Add new VSX entry in regset_info target_regsets.

	* gdbserver/configure.srv: Add new VSX dependencies.

6 files changed, 92 insertions, 5 deletions

diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog
index 999b2d2..cc8ef9b 100644
--- a/gdb/doc/ChangeLog
+++ b/gdb/doc/ChangeLog
@@ -1,3 +1,8 @@
+2008-08-18  Luis Machado  <luisgpm@br.ibm.com>
+
+	* doc/gdb.texinfo (PowerPC): Mention Extended FPR's for POWER7.
+	(PowerPC features): Mention feature set for VSX registers.
+
 2008-08-13  Joel Brobecker  <brobecker@adacore.com>
 
 	* gdb.texinfo (Ada Mode Intro): Improve the documentation regarding
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 1ef4c8a..61c2917 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -16427,6 +16427,9 @@ The pseudo-registers go from @code{$dl0} through @code{$dl15}, and are formed
 by joining the even/odd register pairs @code{f0} and @code{f1} for @code{$dl0},
 @code{f2} and @code{f3} for @code{$dl1} and so on.
 
+For POWER7 processors, @value{GDB} provides a set of pseudo-registers, the 64-bit
+wide Extended Floating Point Registers (@samp{f32} through @samp{f63}).
+
 
 @node Controlling GDB
 @chapter Controlling @value{GDBN}
@@ -27865,6 +27868,13 @@ The @samp{org.gnu.gdb.power.altivec} feature is optional.  It should
 contain registers @samp{vr0} through @samp{vr31}, @samp{vscr},
 and @samp{vrsave}.
 
+The @samp{org.gnu.gdb.power.vsx} feature is optional.  It should
+contain registers @samp{vs0h} through @samp{vs31h}.  @value{GDBN}
+will combine these registers with the floating point registers
+(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0}
+through @samp{vr31}} to present the 128-bit wide registers @samp{vs0}
+through @samp{vs63}, the set of vector registers for POWER7.
+
 The @samp{org.gnu.gdb.power.spe} feature is optional.  It should
 contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and
 @samp{spefscr}.  SPE targets should provide 32-bit registers in
diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog
index a4ea4be..2ea9f10 100644
--- a/gdb/gdbserver/ChangeLog
+++ b/gdb/gdbserver/ChangeLog
@@ -1,3 +1,18 @@
+2008-08-18  Luis Machado  <luisgpm@br.ibm.com>
+
+	* Makefile.in: Add required vsx dependencies.
+
+	* linux-ppc-low: Define PPC_FEATURE_HAS_VSX.
+	Declare init_registers_powerpc_vsx32l.
+	Declare init_registers_powerpc_vsx64l.
+	Define PTRACE_GETVSXREGS and PTRACE_SETVSXREGS.
+	(ppc_arch_setup): Check for VSX in hwcap.
+	(ppc_fill_vsxregset): New function.
+	(ppc_store_vsxregset): New function.
+	Add new VSX entry in regset_info target_regsets.
+
+	* configure.srv: Add new VSX dependencies.
+
 2008-08-12  Pedro Alves  <pedro@codesourcery.com>
 
 	* remote-utils.c (noack_mode, transport_is_reliable): New globals.
diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
index 9a197af..952e31c 100644
--- a/gdb/gdbserver/Makefile.in
+++ b/gdb/gdbserver/Makefile.in
@@ -224,8 +224,8 @@ clean:
 	rm -f reg-cris.c reg-crisv32.c reg-x86-64-linux.c reg-xtensa.c
 	rm -f arm-with-iwmmxt.c mips-linux.c mips64-linux.c
 	rm -f powerpc-32l.c powerpc-64l.c powerpc-e500l.c
-	rm -f powerpc-altivec32l.c powerpc-altivec64l.c
-	rm -f xml-builtin.c stamp-xml
+	rm -f powerpc-altivec32l.c powerpc-vsx32l.c powerpc-altivec64l.c
+	rm -f powerpc-vsx64l.c xml-builtin.c stamp-xml
 
 maintainer-clean realclean distclean: clean
 	rm -f nm.h tm.h xm.h config.status config.h stamp-h config.log
@@ -369,6 +369,9 @@ powerpc-32l.c : $(srcdir)/../regformats/rs6000/powerpc-32l.dat $(regdat_sh)
 powerpc-altivec32l.o : powerpc-altivec32l.c $(regdef_h)
 powerpc-altivec32l.c : $(srcdir)/../regformats/rs6000/powerpc-altivec32l.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-altivec32l.dat powerpc-altivec32l.c
+powerpc-vsx32l.o : powerpc-vsx32l.c $(regdef_h)
+powerpc-vsx32l.c : $(srcdir)/../regformats/rs6000/powerpc-vsx32l.dat $(regdat_sh)
+	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-vsx32l.dat powerpc-vsx32l.c
 powerpc-e500l.o : powerpc-e500l.c $(regdef_h)
 powerpc-e500l.c : $(srcdir)/../regformats/rs6000/powerpc-e500l.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-e500l.dat powerpc-e500l.c
@@ -378,6 +381,9 @@ powerpc-64l.c : $(srcdir)/../regformats/rs6000/powerpc-64l.dat $(regdat_sh)
 powerpc-altivec64l.o : powerpc-altivec64l.c $(regdef_h)
 powerpc-altivec64l.c : $(srcdir)/../regformats/rs6000/powerpc-altivec64l.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-altivec64l.dat powerpc-altivec64l.c
+powerpc-vsx64l.o : powerpc-vsx64l.c $(regdef_h)
+powerpc-vsx64l.c : $(srcdir)/../regformats/rs6000/powerpc-vsx64l.dat $(regdat_sh)
+	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-vsx64l.dat powerpc-vsx64l.c
 reg-s390.o : reg-s390.c $(regdef_h)
 reg-s390.c : $(srcdir)/../regformats/reg-s390.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-s390.dat reg-s390.c
diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
index 74b6b95..9dbf153 100644
--- a/gdb/gdbserver/configure.srv
+++ b/gdb/gdbserver/configure.srv
@@ -108,13 +108,17 @@ case "${target}" in
 			;;
   powerpc*-*-linux*)	srv_regobj="powerpc-32l.o"
 			srv_regobj="${srv_regobj} powerpc-altivec32l.o"
+			srv_regobj="${srv_regobj} powerpc-vsx32l.o"
 			srv_regobj="${srv_regobj} powerpc-e500l.o"
 			srv_regobj="${srv_regobj} powerpc-64l.o"
 			srv_regobj="${srv_regobj} powerpc-altivec64l.o"
+			srv_regobj="${srv_regobj} powerpc-vsx64l.o"
 			srv_tgtobj="linux-low.o linux-ppc-low.o"
 			srv_xmlfiles="rs6000/powerpc-32l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-altivec32l.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-vsx32l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-altivec.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/power-vsx.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-core.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-linux.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-fpu.xml"
@@ -122,6 +126,7 @@ case "${target}" in
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-spe.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-64l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-altivec64l.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-vsx64l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power64-core.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power64-linux.xml"
 			srv_linux_usrregs=yes
diff --git a/gdb/gdbserver/linux-ppc-low.c b/gdb/gdbserver/linux-ppc-low.c
index c03b50a..a7bd83f 100644
--- a/gdb/gdbserver/linux-ppc-low.c
+++ b/gdb/gdbserver/linux-ppc-low.c
@@ -25,6 +25,7 @@
 #include <asm/ptrace.h>
 
 /* These are in <asm/cputable.h> in current kernels.  */
+#define PPC_FEATURE_HAS_VSX		0x00000080
 #define PPC_FEATURE_HAS_ALTIVEC         0x10000000
 #define PPC_FEATURE_HAS_SPE             0x00800000
 
@@ -35,12 +36,16 @@ static unsigned long ppc_hwcap;
 void init_registers_powerpc_32l (void);
 /* Defined in auto-generated file powerpc-altivec32l.c.  */
 void init_registers_powerpc_altivec32l (void);
+/* Defined in auto-generated file powerpc-vsx32l.c.  */
+void init_registers_powerpc_vsx32l (void);
 /* Defined in auto-generated file powerpc-e500l.c.  */
 void init_registers_powerpc_e500l (void);
 /* Defined in auto-generated file powerpc-64l.c.  */
 void init_registers_powerpc_64l (void);
 /* Defined in auto-generated file powerpc-altivec64l.c.  */
 void init_registers_powerpc_altivec64l (void);
+/* Defined in auto-generated file powerpc-vsx64l.c.  */
+void init_registers_powerpc_vsx64l (void);
 
 #define ppc_num_regs 73
 
@@ -254,9 +259,10 @@ ppc_arch_setup (void)
   if (msr < 0)
     {
       ppc_get_hwcap (&ppc_hwcap);
-      if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
+      if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
+	init_registers_powerpc_vsx64l ();
+      else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
 	init_registers_powerpc_altivec64l ();
-
       return;
     }
 #endif
@@ -265,9 +271,12 @@ ppc_arch_setup (void)
   init_registers_powerpc_32l ();
 
   ppc_get_hwcap (&ppc_hwcap);
-  if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
+  if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
+    init_registers_powerpc_vsx32l ();
+  else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
     init_registers_powerpc_altivec32l ();
 
+
   /* On 32-bit machines, check for SPE registers.
      Set the low target's regmap field as appropriately.  */
 #ifndef __powerpc64__
@@ -316,6 +325,41 @@ static void ppc_fill_gregset (void *buf)
     ppc_collect_ptrace_register (i, (char *) buf + ppc_regmap[i]);
 }
 
+#ifndef PTRACE_GETVSXREGS
+#define PTRACE_GETVSXREGS 27
+#define PTRACE_SETVSXREGS 28
+#endif
+
+#define SIZEOF_VSXREGS 32*8
+
+static void
+ppc_fill_vsxregset (void *buf)
+{
+  int i, base;
+  char *regset = buf;
+
+  if (!(ppc_hwcap & PPC_FEATURE_HAS_VSX))
+    return;
+
+  base = find_regno ("vs0h");
+  for (i = 0; i < 32; i++)
+    collect_register (base + i, &regset[i * 8]);
+}
+
+static void
+ppc_store_vsxregset (const void *buf)
+{
+  int i, base;
+  const char *regset = buf;
+
+  if (!(ppc_hwcap & PPC_FEATURE_HAS_VSX))
+    return;
+
+  base = find_regno ("vs0h");
+  for (i = 0; i < 32; i++)
+    supply_register (base + i, &regset[i * 8]);
+}
+
 #ifndef PTRACE_GETVRREGS
 #define PTRACE_GETVRREGS 18
 #define PTRACE_SETVRREGS 19
@@ -408,6 +452,8 @@ struct regset_info target_regsets[] = {
      fetch them every time, but still fall back to PTRACE_PEEKUSER for the
      general registers.  Some kernels support these, but not the newer
      PPC_PTRACE_GETREGS.  */
+  { PTRACE_GETVSXREGS, PTRACE_SETVSXREGS, SIZEOF_VSXREGS, EXTENDED_REGS,
+  ppc_fill_vsxregset, ppc_store_vsxregset },
   { PTRACE_GETVRREGS, PTRACE_SETVRREGS, SIZEOF_VRREGS, EXTENDED_REGS,
     ppc_fill_vrregset, ppc_store_vrregset },
   { PTRACE_GETEVRREGS, PTRACE_SETEVRREGS, 32 * 4 + 8 + 4, EXTENDED_REGS,