Fix opcodes includes

Now that gdb can unconditionally use a -I pointing at the top of the
source tree, we can remove the ugly "../opcodes/" formulation that was
needed earlier.  This patch adds the -I and cleans up these includes.

gdb/ChangeLog
2019-10-23  Tom Tromey  <tom@tromey.com>

	* arc-tdep.c: Remove ".." from include.
	* frv-tdep.c: Remove ".." from include.
	* lm32-tdep.c: Remove ".." from include.
	* microblaze-tdep.c: Remove ".." from include.
	* or1k-tdep.h: Remove ".." from include.
	* s12z-tdep.c: Remove ".." from include.
	* Makefile.in (OPCODES_CFLAGS): Add comment.
	(TOP_CFLAGS): New variable.
	(INTERNAL_CFLAGS_BASE): Add TOP_CFLAGS.

Change-Id: I21428726d55f9fab0c9da90b56f6664f258cf91a

9 files changed, 27 insertions, 11 deletions

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 7dd596e..09adb91 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,17 @@
 2019-10-23  Tom Tromey  <tom@tromey.com>
 
+	* arc-tdep.c: Remove ".." from include.
+	* frv-tdep.c: Remove ".." from include.
+	* lm32-tdep.c: Remove ".." from include.
+	* microblaze-tdep.c: Remove ".." from include.
+	* or1k-tdep.h: Remove ".." from include.
+	* s12z-tdep.c: Remove ".." from include.
+	* Makefile.in (OPCODES_CFLAGS): Add comment.
+	(TOP_CFLAGS): New variable.
+	(INTERNAL_CFLAGS_BASE): Add TOP_CFLAGS.
+
+2019-10-23  Tom Tromey  <tom@tromey.com>
+
 	* Makefile.in (READLINE_DIR): Update.
 
 2019-10-23  Tankut Baris Aktemur  <tankut.baris.aktemur@intel.com>
diff --git a/gdb/Makefile.in b/gdb/Makefile.in
index fe599b4..c924373 100644
--- a/gdb/Makefile.in
+++ b/gdb/Makefile.in
@@ -459,8 +459,12 @@ OPCODES = $(OPCODES_DIR)/libopcodes.a
 # Where are the other opcode tables which only have header file
 # versions?
 OP_INCLUDE = $(INCLUDE_DIR)/opcode
+# See TOP_CFLAGS as well.
 OPCODES_CFLAGS = -I$(OP_INCLUDE)
 
+# Allow includes like "opcodes/mumble.h".
+TOP_CFLAGS = -I$(top_srcdir)/..
+
 # The simulator is usually nonexistent; targets that include one
 # should set this to list all the .o or .a files to be linked in.
 SIM = @SIM@
@@ -576,7 +580,7 @@ INTERNAL_CFLAGS_BASE = \
 	$(GDB_CFLAGS) $(OPCODES_CFLAGS) $(READLINE_CFLAGS) $(ZLIBINC) \
 	$(BFD_CFLAGS) $(INCLUDE_CFLAGS) $(LIBDECNUMBER_CFLAGS) \
 	$(INTL_CFLAGS) $(INCGNU) $(ENABLE_CFLAGS) $(INTERNAL_CPPFLAGS) \
-	$(SRCHIGH_CFLAGS)
+	$(SRCHIGH_CFLAGS) $(TOP_CFLAGS)
 INTERNAL_WARN_CFLAGS = $(INTERNAL_CFLAGS_BASE) $(GDB_WARN_CFLAGS)
 INTERNAL_CFLAGS = $(INTERNAL_WARN_CFLAGS) $(GDB_WERROR_CFLAGS)
 
diff --git a/gdb/arc-tdep.c b/gdb/arc-tdep.c
index 7f44702..6bcd9b1 100644
--- a/gdb/arc-tdep.c
+++ b/gdb/arc-tdep.c
@@ -33,7 +33,7 @@
 
 /* ARC header files.  */
 #include "opcode/arc.h"
-#include "../opcodes/arc-dis.h"
+#include "opcodes/arc-dis.h"
 #include "arc-tdep.h"
 
 /* Standard headers.  */
diff --git a/gdb/frv-tdep.c b/gdb/frv-tdep.c
index 866b9e9..7635404 100644
--- a/gdb/frv-tdep.c
+++ b/gdb/frv-tdep.c
@@ -29,7 +29,7 @@
 #include "dis-asm.h"
 #include "sim-regno.h"
 #include "gdb/sim-frv.h"
-#include "../opcodes/frv-desc.h"	/* for the H_SPR_... enums */
+#include "opcodes/frv-desc.h"	/* for the H_SPR_... enums */
 #include "symtab.h"
 #include "elf-bfd.h"
 #include "elf/frv.h"
diff --git a/gdb/lm32-tdep.c b/gdb/lm32-tdep.c
index 1f746d2..088f035 100644
--- a/gdb/lm32-tdep.c
+++ b/gdb/lm32-tdep.c
@@ -35,7 +35,7 @@
 #include "regcache.h"
 #include "trad-frame.h"
 #include "reggroups.h"
-#include "../opcodes/lm32-desc.h"
+#include "opcodes/lm32-desc.h"
 #include <algorithm>
 
 /* Macros to extract fields from an instruction.  */
diff --git a/gdb/mep-tdep.c b/gdb/mep-tdep.c
index 056b61a..41eef91 100644
--- a/gdb/mep-tdep.c
+++ b/gdb/mep-tdep.c
@@ -48,8 +48,8 @@
 
 /* Get the user's customized MeP coprocessor register names from
    libopcodes.  */
-#include "../opcodes/mep-desc.h"
-#include "../opcodes/mep-opc.h"
+#include "opcodes/mep-desc.h"
+#include "opcodes/mep-opc.h"
 
 
 /* The gdbarch_tdep structure.  */
diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
index 1248acb..44bfe7f 100644
--- a/gdb/microblaze-tdep.c
+++ b/gdb/microblaze-tdep.c
@@ -34,8 +34,8 @@
 #include "dwarf2-frame.h"
 #include "osabi.h"
 #include "target-descriptions.h"
-#include "../opcodes/microblaze-opcm.h"
-#include "../opcodes/microblaze-dis.h"
+#include "opcodes/microblaze-opcm.h"
+#include "opcodes/microblaze-dis.h"
 #include "microblaze-tdep.h"
 #include "remote.h"
 
diff --git a/gdb/or1k-tdep.h b/gdb/or1k-tdep.h
index e66c4a1..fbd3e95 100644
--- a/gdb/or1k-tdep.h
+++ b/gdb/or1k-tdep.h
@@ -23,8 +23,8 @@
 #define TARGET_OR1K
 #endif
 
-#include "../opcodes/or1k-desc.h"
-#include "../opcodes/or1k-opc.h"
+#include "opcodes/or1k-desc.h"
+#include "opcodes/or1k-opc.h"
 
 /* General Purpose Registers */
 #define OR1K_ZERO_REGNUM          0
diff --git a/gdb/s12z-tdep.c b/gdb/s12z-tdep.c
index 1f3a9e2..094698d 100644
--- a/gdb/s12z-tdep.c
+++ b/gdb/s12z-tdep.c
@@ -30,7 +30,7 @@
 #include "opcode/s12z.h"
 #include "trad-frame.h"
 #include "remote.h"
-#include "../opcodes/s12z-opc.h"
+#include "opcodes/s12z-opc.h"
 
 /* Two of the registers included in S12Z_N_REGISTERS are
    the CCH and CCL "registers" which are just views into