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| author | Mark Kettenis <kettenis@gnu.org> | 2003-09-27 21:57:56 +0000 |
|---|---|---|
| committer | Mark Kettenis <kettenis@gnu.org> | 2003-09-27 21:57:56 +0000 |
| commit | 5716833cf88e806df832f6185960991cc15772a6 (patch) | |
| tree | 76a8d2b5f9e0bb9e08bc0013db719ad211a8c34d /gdb/x86-64-tdep.c | |
| parent | 41d35cb0fe5aff6050e3dce2506a51876d10d26a (diff) | |
| download | gdb-5716833cf88e806df832f6185960991cc15772a6.zip gdb-5716833cf88e806df832f6185960991cc15772a6.tar.gz gdb-5716833cf88e806df832f6185960991cc15772a6.tar.bz2 | |
* i386-tdep.h: Put opaque declarations in alphabetical
order. Remove spurious whitespace.
(struct gdbarch_tdep): add st0_regnum and mm0_regnum members.
(i386_sse_regnum_p, i386_mxcsr_regnum_p): Remove prototypes.
* i386-tdep.c (MM0_REGNUM): Remove define.
(i386_mmx_regnum_p): Add gdbarch argument.
(i386_sse_regnum_p, i386_mxcsr_regnum_p): Add gdbarch argument.
Rewrite using new macro definitions for FPU/SSE registers.
(i386_fp_regnum_p, i386_fpc_regnum_p): Rewrite using new macro
definitions from i387-tdep.h.
(i386_register_name): Update.
(i386_stab_reg_to_regnum, i386_dwarf_reg_to_regnum): Update to use
new macro definitions for FPU/SSE registers.
(i386_extract_return_value): Determine whether floating-point
registers are present by examining REGCACHE's architecture.
(i386_store_return_value): Likewise. Use I386_MAX_REGISTER_SIZE
instead of FPU_REG_RAW_SIZE. Use new macro definitions for
FPU/SSE registers.
(i386_register_type): Update.
(i386_mmx_regnum_to_fp_regnum): Rewrite using new macro
definitions for FPU registers. Use REGCACHE's architecture to
determine the appropriate register numbers.
(i386_pseudo_register_read, i386_pseudo_register_write,
i386_register_reggroup_p): Update.
(i386_gdbarch_init): Initialize TDEP->st0_regnum and
TDEP->mm0_regnum.
* i387-tdep.h (I387_FCTRL_REGNUM, I387_FSTAT_REGNUM,
I387_FTAG_REGNUM, I387_FISEG_REGNUM, I387_FIOFF_REGNUM,
I387_FOSEG_REGNUM, I387_FOOFF_REGNUM, I387_FOP_REGNUM,
I387_XMM0_REGNUM, I387_MXCSR_REGNUM): New defines.
(i387_supply_fsave, i387_fill_fsave, i387_supply_fxsave,
i387_fill_fxsave): Change type of fsave/fxsave argument from `char
*' to `void *'.
* i387-tdep.c (i387_print_float_info, fsave_offset, FSAVE_ADDR,
i387_supply_fsave, i387_fill_fsave, fxsave_offset, FXSAVE_ADDR,
i387_supply_fxsave, i387_fill_fxsave): Update to use new macro
definitions for FPU/SSE registers.
(FXSAVE_MXCSR_ADDR): New define.
* x86-64-tdep.c (x86_64_init_abi): Override TDEP->st0_regnum and
TDEP->mm0_regnum.
(I387_FISEG_REGNUM, I387_FOSEG_REGNUM): Remove defines.
(I387_ST0_REGNUM): Define.
Diffstat (limited to 'gdb/x86-64-tdep.c')
| -rw-r--r-- | gdb/x86-64-tdep.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/gdb/x86-64-tdep.c b/gdb/x86-64-tdep.c index 038ebd2..13fc5d2 100644 --- a/gdb/x86-64-tdep.c +++ b/gdb/x86-64-tdep.c @@ -1209,7 +1209,8 @@ x86_64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) { struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - /* The x86-64 has 16 SSE registers. */ + /* AMD64 has an FPU and 16 SSE registers. */ + tdep->st0_regnum = X86_64_ST0_REGNUM; tdep->num_xmm_regs = 16; /* This is what all the fuss is about. */ @@ -1264,6 +1265,7 @@ x86_64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) /* Avoid wiring in the MMX registers for now. */ set_gdbarch_num_pseudo_regs (gdbarch, 0); + tdep->mm0_regnum = -1; set_gdbarch_unwind_dummy_id (gdbarch, x86_64_unwind_dummy_id); @@ -1278,8 +1280,7 @@ x86_64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) } -#define I387_FISEG_REGNUM FISEG_REGNUM -#define I387_FOSEG_REGNUM FOSEG_REGNUM +#define I387_ST0_REGNUM X86_64_ST0_REGNUM /* The 64-bit FXSAVE format differs from the 32-bit format in the sense that the instruction pointer and data pointer are simply |