aboutsummaryrefslogtreecommitdiff
path: root/gdb/valops.c
diff options
context:
space:
mode:
authorAndrew Burgess <andrew.burgess@embecosm.com>2018-03-06 16:19:52 +0000
committerAndrew Burgess <andrew.burgess@embecosm.com>2018-03-06 19:12:19 +0000
commitd74aff3d95928db6647a11865c396204c50bc157 (patch)
treefaf8778010977e7ef139a75c1f15e0f1ae7de4af /gdb/valops.c
parent7ea78b5973525193eda8e379cc351c7804653216 (diff)
downloadgdb-d74aff3d95928db6647a11865c396204c50bc157.zip
gdb-d74aff3d95928db6647a11865c396204c50bc157.tar.gz
gdb-d74aff3d95928db6647a11865c396204c50bc157.tar.bz2
gdb/riscv: Remove use of pseudo registers
The code making use of pseudo registers was initially intended to support running 32-bit ABI files on 64-bit riscv targets. However, the implementation was incomplete, and broken. For now I've removed all reference to pseudo registers from the riscv target, we've not lost any functionality, and this cleans up failures in the selftests. Once the riscv target has matured a little we'll probably end up bringing back some of the use of pseudo registers in order to better support running 32-bit executables on a 64-bit target. gdb/ChangeLog: * riscv-tdep.c (riscv_pseudo_register_read): Delete. (riscv_pseudo_register_write): Delete. (riscv_gdbarch_init): Remove all use of pseudo registers.
Diffstat (limited to 'gdb/valops.c')
0 files changed, 0 insertions, 0 deletions