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authorJohn Gilmore <gnu@cygnus>1992-10-16 10:47:34 +0000
committerJohn Gilmore <gnu@cygnus>1992-10-16 10:47:34 +0000
commit2268d619462dfcaf7055aede6cde6f7015be29ba (patch)
treece9959452b2add6e01740f5860fcc2f73f97cabe /gdb/ultra3-nat.c
parentc3bbca3aad11d35978fbd96c6672eb4cbe6960f3 (diff)
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Avoid longjmp()-catching compilation errors in cross-ports.
* doc/gdbint.texinfo: Update GET_LONGJMP_TARGET, L_SET doc. * irix4-nat.c, mips-nat.c (JB_ELEMENT_SIZE, get_longjmp_target): Move from mips-tdep.c and tm-{irix3,mips}.h. * mips-nat.c: Remove a bunch of code that was ifdef'd out of native MIPS ports. * nm-irix3.h, nm-mips.h (GET_LONGJMP_TARGET): Move from tm-irix3.h and tm-mips.h. * ultra3-nat.c (register_addr): Move from ultra3-xdep.c. (fetch_core_registers): Fix bfd_seek arguments.
Diffstat (limited to 'gdb/ultra3-nat.c')
-rw-r--r--gdb/ultra3-nat.c62
1 files changed, 60 insertions, 2 deletions
diff --git a/gdb/ultra3-nat.c b/gdb/ultra3-nat.c
index b2e61b4..76ea63b 100644
--- a/gdb/ultra3-nat.c
+++ b/gdb/ultra3-nat.c
@@ -1,4 +1,4 @@
-/* Host-dependent code for GDB, for NYU Ultra3 running Sym1 OS.
+/* Native-dependent code for GDB, for NYU Ultra3 running Sym1 OS.
Copyright (C) 1988, 1989, 1991, 1992 Free Software Foundation, Inc.
Contributed by David Wood (wood@nyu.edu) at New York University.
@@ -36,6 +36,24 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#include <sys/file.h>
#include <sys/stat.h>
+/* Assumes support for AMD's Binary Compatibility Standard
+ for ptrace(). If you define ULTRA3, the ultra3 extensions to
+ ptrace() are used allowing the reading of more than one register
+ at a time.
+
+ This file assumes KERNEL_DEBUGGING is turned off. This means
+ that if the user/gdb tries to read gr64-gr95 or any of the
+ protected special registers we silently return -1 (see the
+ CANNOT_STORE/FETCH_REGISTER macros). */
+#define ULTRA3
+
+#if !defined (offsetof)
+# define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
+#endif
+
+extern int errno;
+struct ptrace_user pt_struct;
+
/* Get all available registers from the inferior. Registers that are
* defined in REGISTER_NAMES, but not available to the user/gdb are
* supplied as -1. This may include gr64-gr95 and the protected special
@@ -232,7 +250,7 @@ fetch_core_registers ()
for (regno = 0 ; regno < NUM_REGS; regno++) {
if (!CANNOT_FETCH_REGISTER(regno)) {
- val = bfd_seek (core_bfd, register_addr (regno, 0), 0);
+ val = bfd_seek (core_bfd, (file_ptr) register_addr (regno, 0), L_SET);
if (val < 0 || (val = bfd_read (buf, sizeof buf, 1, core_bfd)) < 0) {
char * buffer = (char *) alloca (strlen (reg_names[regno]) + 35);
strcpy (buffer, "Reading core register ");
@@ -248,3 +266,43 @@ fetch_core_registers ()
}
+/*
+ * Takes a register number as defined in tm.h via REGISTER_NAMES, and maps
+ * it to an offset in a struct ptrace_user defined by AMD's BCS.
+ * That is, it defines the mapping between gdb register numbers and items in
+ * a struct ptrace_user.
+ * A register protection scheme is set up here. If a register not
+ * available to the user is specified in 'regno', then an address that
+ * will cause ptrace() to fail is returned.
+ */
+unsigned int
+register_addr (regno,blockend)
+ unsigned int regno;
+ char *blockend;
+{
+ if ((regno >= LR0_REGNUM) && (regno < LR0_REGNUM + 128)) {
+ return(offsetof(struct ptrace_user,pt_lr[regno-LR0_REGNUM]));
+ } else if ((regno >= GR96_REGNUM) && (regno < GR96_REGNUM + 32)) {
+ return(offsetof(struct ptrace_user,pt_gr[regno-GR96_REGNUM]));
+ } else {
+ switch (regno) {
+ case GR1_REGNUM: return(offsetof(struct ptrace_user,pt_gr1));
+ case CPS_REGNUM: return(offsetof(struct ptrace_user,pt_psr));
+ case NPC_REGNUM: return(offsetof(struct ptrace_user,pt_pc0));
+ case PC_REGNUM: return(offsetof(struct ptrace_user,pt_pc1));
+ case PC2_REGNUM: return(offsetof(struct ptrace_user,pt_pc2));
+ case IPC_REGNUM: return(offsetof(struct ptrace_user,pt_ipc));
+ case IPA_REGNUM: return(offsetof(struct ptrace_user,pt_ipa));
+ case IPB_REGNUM: return(offsetof(struct ptrace_user,pt_ipb));
+ case Q_REGNUM: return(offsetof(struct ptrace_user,pt_q));
+ case BP_REGNUM: return(offsetof(struct ptrace_user,pt_bp));
+ case FC_REGNUM: return(offsetof(struct ptrace_user,pt_fc));
+ default:
+ fprintf_filtered(stderr,"register_addr():Bad register %s (%d)\n",
+ reg_names[regno],regno);
+ return(0xffffffff); /* Should make ptrace() fail */
+ }
+ }
+}
+
+