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author | Yao Qi <yao@codesourcery.com> | 2011-08-14 15:58:40 +0000 |
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committer | Yao Qi <yao@codesourcery.com> | 2011-08-14 15:58:40 +0000 |
commit | d93f7b5c9552338037fcb8fc03b3a04e21c478cd (patch) | |
tree | d58f54fca8f04dae26a3c4a478249ee3ddc05255 /gdb/testsuite | |
parent | 58dbd54186b324c1481454892e03c5fb8307dbc1 (diff) | |
download | gdb-d93f7b5c9552338037fcb8fc03b3a04e21c478cd.zip gdb-d93f7b5c9552338037fcb8fc03b3a04e21c478cd.tar.gz gdb-d93f7b5c9552338037fcb8fc03b3a04e21c478cd.tar.bz2 |
gdb/testsuite/
* gdb.base/maint.exp: set data_section to ".neardata".
* gdb.base/savedregs.c (thrower): Trigger SIGILL on NO-MMU machine.
* gdb.base/savedregs.exp: Handle SIGILL.
* gdb.mi/mi-syn-frame.c (bar): Trigger SIGILL on NO-MMU machine.
* gdb.xml/tdesc-regs.exp: Set core-regs for tic6x-*-*.
Diffstat (limited to 'gdb/testsuite')
-rw-r--r-- | gdb/testsuite/ChangeLog | 8 | ||||
-rw-r--r-- | gdb/testsuite/gdb.base/maint.exp | 5 | ||||
-rw-r--r-- | gdb/testsuite/gdb.base/savedregs.c | 14 | ||||
-rw-r--r-- | gdb/testsuite/gdb.base/savedregs.exp | 1 | ||||
-rw-r--r-- | gdb/testsuite/gdb.mi/mi-syn-frame.c | 13 | ||||
-rw-r--r-- | gdb/testsuite/gdb.xml/tdesc-regs.exp | 3 |
6 files changed, 42 insertions, 2 deletions
diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog index 2870aa2..5902d89 100644 --- a/gdb/testsuite/ChangeLog +++ b/gdb/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2011-08-14 Yao Qi <yao@codesourcery.com> + + * gdb.base/maint.exp: set data_section to ".neardata". + * gdb.base/savedregs.c (thrower): Trigger SIGILL on NO-MMU machine. + * gdb.base/savedregs.exp: Handle SIGILL. + * gdb.mi/mi-syn-frame.c (bar): Trigger SIGILL on NO-MMU machine. + * gdb.xml/tdesc-regs.exp: Set core-regs for tic6x-*-*. + 2011-08-12 Doug Evans <dje@google.com> * gdb.python/py-symbol.exp: Add test for symbol.type. diff --git a/gdb/testsuite/gdb.base/maint.exp b/gdb/testsuite/gdb.base/maint.exp index 61ad439..2bd25936 100644 --- a/gdb/testsuite/gdb.base/maint.exp +++ b/gdb/testsuite/gdb.base/maint.exp @@ -394,6 +394,11 @@ gdb_test_multiple "maint info sections" "maint info sections" { set data_section ER_RW pass "maint info sections" } + -re "Exec file:\r\n.*break($EXEEXT)?., file type.*neardata.*$gdb_prompt $" { + # c6x doesn't have .data section. It has .neardata and .fardata section. + set data_section ".neardata" + pass "maint info sections" + } -re "Exec file:\r\n.*break($EXEEXT)?., file type.*$gdb_prompt $" { pass "maint info sections" } diff --git a/gdb/testsuite/gdb.base/savedregs.c b/gdb/testsuite/gdb.base/savedregs.c index 9f302a0..4f962ac 100644 --- a/gdb/testsuite/gdb.base/savedregs.c +++ b/gdb/testsuite/gdb.base/savedregs.c @@ -45,11 +45,25 @@ catcher (int sig) static void thrower (void) { + /* Trigger a SIGSEGV. */ *(char *)0 = 0; + + /* On MMU-less system, previous memory access to address zero doesn't + trigger a SIGSEGV. Trigger a SIGILL. Each arch should define its + own illegal instruction here. */ + +#if defined(__arm__) + asm(".word 0xf8f00000"); +#elif defined(__TMS320C6X__) + asm(".word 0x56454313"); +#else +#endif + } main () { + signal (SIGILL, catcher); signal (SIGSEGV, catcher); thrower (); } diff --git a/gdb/testsuite/gdb.base/savedregs.exp b/gdb/testsuite/gdb.base/savedregs.exp index eeee0ff..b9204a4 100644 --- a/gdb/testsuite/gdb.base/savedregs.exp +++ b/gdb/testsuite/gdb.base/savedregs.exp @@ -143,6 +143,7 @@ process_saved_regs thrower { main } { } # Continue to the signal catcher, check main's saved-reg info, capture # catcher's saved-reg info. gdb_test "handle SIGSEGV pass print nostop" +gdb_test "handle SIGILL pass print nostop" gdb_test "advance catcher" "catcher .* at .*" process_saved_regs catcher { sigtramp thrower } { main } diff --git a/gdb/testsuite/gdb.mi/mi-syn-frame.c b/gdb/testsuite/gdb.mi/mi-syn-frame.c index ddfc08e..332f246 100644 --- a/gdb/testsuite/gdb.mi/mi-syn-frame.c +++ b/gdb/testsuite/gdb.mi/mi-syn-frame.c @@ -25,9 +25,18 @@ foo (void) void bar (void) { - char *nuller = 0; + *(char *)0 = 0; /* try to cause a segfault */ + + /* On MMU-less system, previous memory access to address zero doesn't + trigger a SIGSEGV. Trigger a SIGILL. Each arch should define its + own illegal instruction here. */ +#if defined(__arm__) + asm(".word 0xf8f00000"); +#elif defined(__TMS320C6X__) + asm(".word 0x56454313"); +#else +#endif - *nuller = 'a'; /* try to cause a segfault */ } void diff --git a/gdb/testsuite/gdb.xml/tdesc-regs.exp b/gdb/testsuite/gdb.xml/tdesc-regs.exp index 224c082..6a12dba 100644 --- a/gdb/testsuite/gdb.xml/tdesc-regs.exp +++ b/gdb/testsuite/gdb.xml/tdesc-regs.exp @@ -53,6 +53,9 @@ switch -glob -- [istarget] { unsupported "register tests" return 0 } + "tic6x-*-*" { + set core-regs {tic6x-core.xml} + } "i?86-*-*" { set architecture "i386" set regdir "i386/" |