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| author | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2021-01-12 13:57:23 +0000 |
|---|---|---|
| committer | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2021-01-12 14:03:58 +0000 |
| commit | 5291fe3cd14f2861fad43303a10550e71dc14182 (patch) | |
| tree | 80ab70388403d31b63df0fcc67a505e059164c7c /gdb/testsuite/gdb.arch | |
| parent | d546b61084cec687e0063b2e0e169b4690341c23 (diff) | |
| download | gdb-5291fe3cd14f2861fad43303a10550e71dc14182.zip gdb-5291fe3cd14f2861fad43303a10550e71dc14182.tar.gz gdb-5291fe3cd14f2861fad43303a10550e71dc14182.tar.bz2 | |
aarch64: Add support for bfloat16 in gdb.
This patch adds support for bfloat16 in AArch64 gdb.
Also adds the field "bf" to vector registers h0-h31.
Also adds the vector "bf" to h field in vector registers v0-v31.
The following is how the vector register h and v looks like.
Before this patch:
(gdb) p $h0
$1 = {f = 0, u = 0, s = 0}
(gdb) p/x $h0
$2 = {f = 0x0, u = 0x0, s = 0x0}
(gdb) p $v0.h
$3 = {f = {0, 0, 0, 0, 0, 0, 0, 0}, u = {0, 0, 0, 0, 0, 0, 0, 0}, s = {0, 0, 0, 0, 0, 0, 0, 0}}
(gdb) p/x $v0.h
$4 = {f = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, u = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
s = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}
After this patch:
(gdb) p $h0
$1 = {bf = 0, f = 0, u = 0, s = 0}
(gdb) p/x $h0
$2 = {bf = 0x0, f = 0x0, u = 0x0, s = 0x0}
(gdb) p $v0.h
$3 = {bf = {0, 0, 0, 0, 0, 0, 0, 0}, f = {0, 0, 0, 0, 0, 0, 0, 0}, u = {0, 0, 0, 0, 0, 0, 0, 0},
s = {0, 0, 0, 0, 0, 0, 0, 0}}
(gdb) p/x $v0.h
$4 = {bf = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, f = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
u = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, s = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}
gdb/ChangeLog:
2021-01-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* aarch64-tdep.c (aarch64_vnh_type): Add "bf" field in h registers.
(aarch64_vnv_type): Add "bf" type in h field of v registers.
* features/aarch64-fpu.c (create_feature_aarch64_fpu): Regenerated.
* features/aarch64-fpu.xml: Add bfloat16 type.
gdb/testsuite/ChangeLog:
2021-01-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* gdb.arch/aarch64-fp.exp: Modify to test bfloat16 support.
Diffstat (limited to 'gdb/testsuite/gdb.arch')
| -rw-r--r-- | gdb/testsuite/gdb.arch/aarch64-fp.exp | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/gdb/testsuite/gdb.arch/aarch64-fp.exp b/gdb/testsuite/gdb.arch/aarch64-fp.exp index 8d06a3f..4fb8e34 100644 --- a/gdb/testsuite/gdb.arch/aarch64-fp.exp +++ b/gdb/testsuite/gdb.arch/aarch64-fp.exp @@ -75,3 +75,28 @@ gdb_test "p/x \$fpcr" \ "fpcr.*0x\[0-9a-fA-F\].*" \ "check register fpcr value" +with_test_prefix "bfloat16" { + gdb_test "set \$h0.bf = 1.185e-38" \ + ".*" \ + "set h0.bf to 129" + + gdb_test "p \$h0" \ + "h0.*{bf = 1.185e-38, f = 7.689e-06, u = 129, s = 129}" \ + "h0 fields are valid" + + gdb_test "set \$v0.h.bf\[0\] = 0" \ + "v0.* = 0" \ + "set v0.h.bf\[0\] to 0" + + gdb_test "p \$v0.h.s\[0\]" \ + "v0.* = 0" \ + "v0.h.s\[0\] is 0" + + gdb_test "set \$v0.h.bf\[0\] = 1.185e-38" \ + "v0.* = 1.185e-38" \ + "set v0.h.bf\[0\] to 129" + + gdb_test "p \$v0.h.s\[0\]" \ + "v0.* = 129" \ + "v0.h.s\[0\] is 129" +} |