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| author | H.J. Lu <hjl.tools@gmail.com> | 2015-07-22 13:24:20 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2015-07-22 13:26:21 -0700 |
| commit | 20c2a615876bdf0d5dc8e2db86eea1312d9dc9b8 (patch) | |
| tree | 156526f9fed8f28581d1d741494feee7c6b92c65 /gdb/target-delegates.c | |
| parent | 7360e63f80782cf34a195eb1c6149760c3da7f14 (diff) | |
| download | gdb-20c2a615876bdf0d5dc8e2db86eea1312d9dc9b8.zip gdb-20c2a615876bdf0d5dc8e2db86eea1312d9dc9b8.tar.gz gdb-20c2a615876bdf0d5dc8e2db86eea1312d9dc9b8.tar.bz2 | |
Fix memory operand size for vcvtt?ps2u?qq instructions
When disassembling AVX512 vcvtt?ps2u?q instructions with data
broadcasting enabled, memory operand size should be DWORD.
gas/testsuite/
PR binutils/18631
* gas/i386avx512dq-intel.d: Replace "QWORD" with "DWORD" in
vcvtt?ps2u?qq instructions disassembly regexes.
Add disassembly regex for new test.
* gas/i386/avx512dq.d: Likewise.
* gas/i386/avx512dq_vl-intel.d: Likewise.
* gas/i386/avx512dq_vl.d: Likewise.
* gas/i386/x86-64-avx512dq-intel.d: Likewise.
* gas/i386/x86-64-avx512dq.d: Likewise.
* gas/i386/x86-64-avx512dq_vl-intel.d: Likewise.
* gas/i386/x86-64-avx512dq_vl.d: Likewise.
* gas/i386/avx512dq.s: Add new test for Intel syntax with memory
operand and broadcasting enabled.
* gas/i386/avx512dq_vl.s: Likewise.
* gas/i386/x86-64-avx512dq.s: Likewise.
* gas/i386/x86-64-avx512dq_vl.s: Likewise.
opcodes/
PR binutils/18631
* i386-dis-evex.h (EVEX_W_0F78_P_2): Replace "EXxmmq" with
"EXEvexHalfBcstXmmq" for the second operand.
(EVEX_W_0F79_P_2): Likewise.
(EVEX_W_0F7A_P_2): Likewise.
(EVEX_W_0F7B_P_2): Likewise.
Diffstat (limited to 'gdb/target-delegates.c')
0 files changed, 0 insertions, 0 deletions