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authorRichard Sandiford <richard.sandiford@arm.com>2016-08-23 09:01:54 +0100
committerRichard Sandiford <richard.sandiford@arm.com>2016-08-23 09:01:54 +0100
commit9d30b0bdab56a563a29984705778168ae93f71ae (patch)
tree24b2581afefcdbd43a9229d94181903ecc5cf371 /gdb/stack.c
parentd44ea5d05b305bebedd2afaf344b361c5c2f9815 (diff)
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[AArch64] Add OP parameter to aarch64-tbl.h macros
Nick recently wrapped most of aarch64-tbl.h entries in macros like CORE_INSN. These new macros assumed that the aarch64_op "op" field of aarch64_opcode is 0 and that the new "verifier" field is NULL. However, there are a lot of CORE, SIMD and FP insns whose table entries need a nonzero aarch64_op field, so these entries continued to use a braced list instead of a macro. This makes the table entries less consistent and means that there are still quite a few braced entries that need to be updated when making further changes to the aarch64_opcode structure. I think the number of entries that need a nonzero aarch64_op field is high enough to justify having an explicit aarch64_op entry for all CORE, SIMD and FP entries. This patch adds one and updates all existing uses of the macros. A following patch makes more use of the macros. I've followed existing practice by using 0 instead of OP_NIL for empty aarch64_op fields. Empty fields are still the norm and you need to know what the fields are when reading the table anyway, so it was hard to justify an additional patch to replace all 0 op fields with OP_NIL. opcodes/ * aarch64-tbl.h (CORE_INSN, __FP_INSN, SIMD_INSN): Add OP parameter. (aarch64_opcode_table): Update uses accordingly.
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