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author | John Gilmore <gnu@cygnus> | 1994-01-11 09:13:25 +0000 |
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committer | John Gilmore <gnu@cygnus> | 1994-01-11 09:13:25 +0000 |
commit | c6d8db406c2feb5b7482347df566b708d911e734 (patch) | |
tree | 5301bb5deffa5f50c5045ac9674896127ff980d9 /gdb/sparc-nat.c | |
parent | c369b6a32f2d629c4ed70850adf20ec4057e84f5 (diff) | |
download | gdb-c6d8db406c2feb5b7482347df566b708d911e734.zip gdb-c6d8db406c2feb5b7482347df566b708d911e734.tar.gz gdb-c6d8db406c2feb5b7482347df566b708d911e734.tar.bz2 |
[Revise prev change -- this is how it's been running at Adobe, and it works
there.]
* sparc-tdep.c (sparc_pop_frame): Pop the fsr and csr (float and
coprocessor status regs) when popping a frame. This fixes
float exceptions that occur after calling inferior functions.
* sparc-nat.c (fetch_inferior_registers, store_inferior_registers):
Read and write the fsr (float status register) to/from the child
process along with the float regs. Remove Peter Schauer's change
of May 24 '93, which has higher overhead and doesn't solve the
real problem (which was that FSR wasn't being set).
Diffstat (limited to 'gdb/sparc-nat.c')
-rw-r--r-- | gdb/sparc-nat.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/gdb/sparc-nat.c b/gdb/sparc-nat.c index 5fcdb92..735f3db 100644 --- a/gdb/sparc-nat.c +++ b/gdb/sparc-nat.c @@ -222,20 +222,10 @@ store_inferior_registers (regno) if (wanna_store & FP_REGS) { if (!register_valid[FP0_REGNUM+9]) abort(); - /* Initialize inferior_fp_registers members that gdb doesn't set - by reading them from the inferior. This may not be needed - any more, now that we set Fpu_fsr. */ - if (0 != - ptrace (PTRACE_GETFPREGS, inferior_pid, - (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0)) - perror("ptrace_getfpregs"); - memcpy (&inferior_fp_registers, ®isters[REGISTER_BYTE (FP0_REGNUM)], sizeof inferior_fp_registers.fpu_fr); - memcpy (&inferior_fp_registers.Fpu_fsr, ®isters[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE)); - if (0 != ptrace (PTRACE_SETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0)) |