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authorUlrich Weigand <uweigand@de.ibm.com>2011-11-30 08:26:06 +0000
committerUlrich Weigand <uweigand@de.ibm.com>2011-11-30 08:26:06 +0000
commit0161e4b928b40ff84051a4526f3fd1df1273ae18 (patch)
treef0d574eee313bfe76362187dc1366b26554d59da /gdb/s390-tdep.c
parent514f64256c6ad7877e1f2a171a722168de879b23 (diff)
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* s390-tdep.c (s390_displaced_step_fixup): Fix processing of LARL
instruction. Add more diagnostic output.
Diffstat (limited to 'gdb/s390-tdep.c')
-rw-r--r--gdb/s390-tdep.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/gdb/s390-tdep.c b/gdb/s390-tdep.c
index 788f8c1..2e9dd23 100644
--- a/gdb/s390-tdep.c
+++ b/gdb/s390-tdep.c
@@ -1370,9 +1370,9 @@ s390_displaced_step_fixup (struct gdbarch *gdbarch,
if (debug_displaced)
fprintf_unfiltered (gdb_stdlog,
- "displaced: (s390) fixup (%s, %s) pc %s amode 0x%x\n",
+ "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
paddress (gdbarch, from), paddress (gdbarch, to),
- paddress (gdbarch, pc), (int) amode);
+ paddress (gdbarch, pc), insnlen, (int) amode);
/* Handle absolute branch and save instructions. */
if (is_rr (insn, op_basr, &r1, &r2)
@@ -1428,9 +1428,11 @@ s390_displaced_step_fixup (struct gdbarch *gdbarch,
/* Handle LOAD ADDRESS RELATIVE LONG. */
else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
{
+ /* Update PC. */
+ regcache_write_pc (regs, from + insnlen);
/* Recompute output address in R1. */
regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
- amode | (from + insnlen + i2*2));
+ amode | (from + i2 * 2));
}
/* If we executed a breakpoint instruction, point PC right back at it. */
@@ -1440,6 +1442,11 @@ s390_displaced_step_fixup (struct gdbarch *gdbarch,
/* For any other insn, PC points right after the original instruction. */
else
regcache_write_pc (regs, from + insnlen);
+
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog,
+ "displaced: (s390) pc is now %s\n",
+ paddress (gdbarch, regcache_read_pc (regs)));
}
/* Normal stack frames. */