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authorCarl Love <cel@us.ibm.com>2021-04-29 17:19:13 -0500
committerCarl Love <cel@us.ibm.com>2021-06-07 10:41:22 -0500
commitecac8d1c14acba1fd20b99c2481d0cab5887e3b7 (patch)
tree6ac1ab466300a266982162dc7aa54f33fcc413b9 /gdb/rs6000-tdep.c
parentf1854e35d87ac3237e0d7a10224a1eff42e65297 (diff)
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Add Power 10 PLT instruction patterns
gdb/ChangeLog: 2021-06-07 Carl Love <cel@us.ibm.com> * ppc-tdep.h (ppc_insn_prefix_dform): Declare. * ppc64-tdep.c(insn_md, insn_x, insn_xo): New macros. (ppc64_plt_pcrel_entry_point, ppc64_pcrel_linkage1_target, ppc64_pcrel_linkage2_target): New functions. (ppc64_standard_linkage9, ppc64_standard_linkage10, ppc64_standard_linkage11, ppc64_standard_linkage12): New ppc instruction patterns. (ppc64_standard_linkage9, ppc64_standard_linkage10, ppc64_standard_linkage11, ppc64_standard_linkage12): New variables in define MAX expression. (ppc64_skip_trampoline_code_1): Handle ppc64_standard_linkage9, ppc64_standard_linkage10, ppc64_standard_linkage11, ppc64_standard_linkage12. * (ppc_insn_prefix_dform): New function.
Diffstat (limited to 'gdb/rs6000-tdep.c')
-rw-r--r--gdb/rs6000-tdep.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index ed73f90..5bcf5fc 100644
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -7371,6 +7371,14 @@ ppc_insn_ds_field (unsigned int insn)
return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
}
+CORE_ADDR
+ppc_insn_prefix_dform (unsigned int insn1, unsigned int insn2)
+{
+ /* result is 34-bits */
+ return (CORE_ADDR) ((((insn1 & 0x3ffff) ^ 0x20000) - 0x20000) << 16)
+ | (CORE_ADDR)(insn2 & 0xffff);
+}
+
/* Initialization code. */
void _initialize_rs6000_tdep ();