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author | Jim Blandy <jimb@codesourcery.com> | 2004-05-11 04:55:32 +0000 |
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committer | Jim Blandy <jimb@codesourcery.com> | 2004-05-11 04:55:32 +0000 |
commit | 383f0f5b9a5fa97db053fb6506e07f5e73eb4993 (patch) | |
tree | 148e49e93bca39b913b8a5de592311291dbbe61b /gdb/rs6000-nat.c | |
parent | 3e5e53f9b018e2fec90c7f35a876f876baad7816 (diff) | |
download | gdb-383f0f5b9a5fa97db053fb6506e07f5e73eb4993.zip gdb-383f0f5b9a5fa97db053fb6506e07f5e73eb4993.tar.gz gdb-383f0f5b9a5fa97db053fb6506e07f5e73eb4993.tar.bz2 |
* ppc-tdep.h (struct gdbarch_tdep): Change definition of
ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this
processor variant lacks those registers.
(ppc_floating_point_unit_p): Change description to make it clear
that this returns info about the ISA, not the ABI.
* rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to
return true or false by checking tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum. The original code replicated the BFD
arch/mach switching done in rs6000_gdbarch_init; it's better to
keep that logic there, and just check the results here.
(rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum to -1 to indicate that we have no
floating-point registers.
(ppc_supply_fpregset, ppc_collect_fpregset)
(rs6000_push_dummy_call, rs6000_extract_return_value)
(rs6000_store_return_value): Assert that we have floating-point
registers.
(rs6000_dwarf2_stab_reg_to_regnum): Add FIXME.
(rs6000_frame_cache): Don't note the locations at which
floating-point registers were saved if we have no fprs.
* aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP
registers.
(fetch_regs_user_thread, fetch_regs_kernel_thread)
(store_regs_user_thread, store_regs_kernel_thread): Only call
supply_fprs / fill_fprs if we actually have floating-point
registers.
(special_register_p): Check ppc_fpscr_regnum before matching
against it.
(supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't
supply / collect fpscr if we don't have it.
* ppc-bdm.c: #include "gdb_assert.h".
(bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we
have floating-point registers, since I can't test this code on
FP-free systems to adapt it.
* ppc-linux-nat.c (ppc_register_u_addr): Don't match against the
fpscr and floating point register numbers if they don't exist.
(fetch_register): Assert that we have floating-point registers
before we reach the code that handles them.
(store_register): Same. And use tdep instead of calling
gdbarch_tdep again.
(fill_fpregset): Don't try to collect FP registers and fpscr if we
don't have them.
(ppc_linux_sigtramp_cache): Don't record the saved locations of
fprs and fpscr if we don't have them.
(ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we
don't have them.
* ppcnbsd-nat.c: #include "gdb_assert.h".
(getfpregs_supplies): Assert that we have floating-point registers.
* ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same.
* ppcobsd-tdep.c: #include "gdb_assert.h".
(ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we
have floating-point registers.
* rs6000-nat.c (regmap): Don't match against the fpscr and
floating point register numbers if they don't exist.
(fetch_inferior_registers, store_inferior_registers,
fetch_core_registers): Only fetch / store / supply the
floating-point registers and the fpscr if we have them.
* Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o)
(ppcobsd-tdep.o): Update dependencies.
Diffstat (limited to 'gdb/rs6000-nat.c')
-rw-r--r-- | gdb/rs6000-nat.c | 42 |
1 files changed, 26 insertions, 16 deletions
diff --git a/gdb/rs6000-nat.c b/gdb/rs6000-nat.c index b80b5a5..5fbf334 100644 --- a/gdb/rs6000-nat.c +++ b/gdb/rs6000-nat.c @@ -159,7 +159,8 @@ regmap (int regno, int *isfloat) if (tdep->ppc_gp0_regnum <= regno && regno < tdep->ppc_gp0_regnum + ppc_num_gprs) return regno; - else if (tdep->ppc_fp0_regnum <= regno + else if (tdep->ppc_fp0_regnum >= 0 + && tdep->ppc_fp0_regnum <= regno && regno < tdep->ppc_fp0_regnum + ppc_num_fprs) { *isfloat = 1; @@ -177,7 +178,8 @@ regmap (int regno, int *isfloat) return CTR; else if (regno == tdep->ppc_xer_regnum) return XER; - else if (regno == tdep->ppc_fpscr_regnum) + else if (tdep->ppc_fpscr_regnum >= 0 + && regno == tdep->ppc_fpscr_regnum) return FPSCR; else if (tdep->ppc_mq_regnum >= 0 && regno == tdep->ppc_mq_regnum) return MQ; @@ -359,8 +361,9 @@ fetch_inferior_registers (int regno) } /* Read general purpose floating point registers. */ - for (regno = 0; regno < ppc_num_fprs; regno++) - fetch_register (tdep->ppc_fp0_regnum + regno); + if (tdep->ppc_fp0_regnum >= 0) + for (regno = 0; regno < ppc_num_fprs; regno++) + fetch_register (tdep->ppc_fp0_regnum + regno); /* Read special registers. */ fetch_register (PC_REGNUM); @@ -369,7 +372,8 @@ fetch_inferior_registers (int regno) fetch_register (tdep->ppc_lr_regnum); fetch_register (tdep->ppc_ctr_regnum); fetch_register (tdep->ppc_xer_regnum); - fetch_register (tdep->ppc_fpscr_regnum); + if (tdep->ppc_fpscr_regnum >= 0) + fetch_register (tdep->ppc_fpscr_regnum); if (tdep->ppc_mq_regnum >= 0) fetch_register (tdep->ppc_mq_regnum); } @@ -398,8 +402,9 @@ store_inferior_registers (int regno) } /* Write floating point registers. */ - for (regno = 0; regno < ppc_num_fprs; regno++) - store_register (tdep->ppc_fp0_regnum + regno); + if (tdep->ppc_fp0_regnum >= 0) + for (regno = 0; regno < ppc_num_fprs; regno++) + store_register (tdep->ppc_fp0_regnum + regno); /* Write special registers. */ store_register (PC_REGNUM); @@ -408,7 +413,8 @@ store_inferior_registers (int regno) store_register (tdep->ppc_lr_regnum); store_register (tdep->ppc_ctr_regnum); store_register (tdep->ppc_xer_regnum); - store_register (tdep->ppc_fpscr_regnum); + if (tdep->ppc_fpscr_regnum >= 0) + store_register (tdep->ppc_fpscr_regnum); if (tdep->ppc_mq_regnum >= 0) store_register (tdep->ppc_mq_regnum); } @@ -583,9 +589,10 @@ fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, for (regi = 0; regi < 32; regi++) supply_register (regi, (char *) ®s->r64.gpr[regi]); - for (regi = 0; regi < 32; regi++) - supply_register (tdep->ppc_fp0_regnum + regi, - (char *) ®s->r64.fpr[regi]); + if (tdep->ppc_fp0_regnum >= 0) + for (regi = 0; regi < 32; regi++) + supply_register (tdep->ppc_fp0_regnum + regi, + (char *) ®s->r64.fpr[regi]); supply_register (PC_REGNUM, (char *) ®s->r64.iar); supply_register (tdep->ppc_ps_regnum, (char *) ®s->r64.msr); @@ -593,16 +600,18 @@ fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, supply_register (tdep->ppc_lr_regnum, (char *) ®s->r64.lr); supply_register (tdep->ppc_ctr_regnum, (char *) ®s->r64.ctr); supply_register (tdep->ppc_xer_regnum, (char *) ®s->r64.xer); - supply_register (tdep->ppc_fpscr_regnum, (char *) ®s->r64.fpscr); + if (tdep->ppc_fpscr_regnum >= 0) + supply_register (tdep->ppc_fpscr_regnum, (char *) ®s->r64.fpscr); } else { for (regi = 0; regi < 32; regi++) supply_register (regi, (char *) ®s->r32.gpr[regi]); - for (regi = 0; regi < 32; regi++) - supply_register (tdep->ppc_fp0_regnum + regi, - (char *) ®s->r32.fpr[regi]); + if (tdep->ppc_fp0_regnum >= 0) + for (regi = 0; regi < 32; regi++) + supply_register (tdep->ppc_fp0_regnum + regi, + (char *) ®s->r32.fpr[regi]); supply_register (PC_REGNUM, (char *) ®s->r32.iar); supply_register (tdep->ppc_ps_regnum, (char *) ®s->r32.msr); @@ -610,7 +619,8 @@ fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, supply_register (tdep->ppc_lr_regnum, (char *) ®s->r32.lr); supply_register (tdep->ppc_ctr_regnum, (char *) ®s->r32.ctr); supply_register (tdep->ppc_xer_regnum, (char *) ®s->r32.xer); - supply_register (tdep->ppc_fpscr_regnum, (char *) ®s->r32.fpscr); + if (tdep->ppc_fpscr_regnum >= 0) + supply_register (tdep->ppc_fpscr_regnum, (char *) ®s->r32.fpscr); if (tdep->ppc_mq_regnum >= 0) supply_register (tdep->ppc_mq_regnum, (char *) ®s->r32.mq); } |