20050901 Paul Gilliam <pgilliam@us.ibm.com>

        * ppc-tdep.h (struct gdbarch_tdep): Better explanation of using
        -1 for nonexistant registers.
        * rs6000-tdep.c (rs6000_register_reggroup_p): Don't assume that
        tdep->ppc_vr0_regnum and tdep->ppc_ev0_regnum are not -1.

1 files changed, 17 insertions, 10 deletions

diff --git a/gdb/ppc-tdep.h b/gdb/ppc-tdep.h
index a2c77da..5037c11 100644
--- a/gdb/ppc-tdep.h
+++ b/gdb/ppc-tdep.h
@@ -152,26 +152,33 @@ struct gdbarch_tdep
     int ppc_ctr_regnum;		/* Count register */
     int ppc_xer_regnum;		/* Integer exception register */
 
-    /* On PPC and RS6000 variants that have no floating-point
-       registers, the next two members will be -1.  */
+    /* Not all PPC and RS6000 variants will have the registers
+       represented below.  A -1 is used to indicate that the register
+       is not present in this variant.  */
+
+    /* Floating-point registers.  */
     int ppc_fp0_regnum;         /* floating-point register 0 */
-    int ppc_fpscr_regnum;	/* Floating point status and condition
-    				   register */
+    int ppc_fpscr_regnum;	/* fp status and condition register */
+
+    /* Segment registers.  */
+    int ppc_sr0_regnum;         /* segment register 0 */
 
-    int ppc_sr0_regnum;         /* segment register 0, or -1 on
-                                   variants that have no segment
-                                   registers.  */
+    /* Multiplier-Quotient Register (older POWER architectures only).  */
+    int ppc_mq_regnum;
 
-    int ppc_mq_regnum;		/* Multiply/Divide extension register */
+    /* Altivec registers.  */
     int ppc_vr0_regnum;		/* First AltiVec register */
     int ppc_vrsave_regnum;	/* Last AltiVec register */
+
+    /* SPE registers.  */
     int ppc_ev0_upper_regnum;   /* First GPR upper half register */
     int ppc_ev0_regnum;         /* First ev register */
     int ppc_ev31_regnum;        /* Last ev register */
     int ppc_acc_regnum;         /* SPE 'acc' register */
     int ppc_spefscr_regnum;     /* SPE 'spefscr' register */
-    int lr_frame_offset;	/* Offset to ABI specific location where
-                                   link register is saved.  */
+
+    /* Offset to ABI specific location where link register is saved.  */
+    int lr_frame_offset;	
 
     /* An array of integers, such that sim_regno[I] is the simulator
        register number for GDB register number I, or -1 if the