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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2014-02-04 18:31:38 +0100
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2014-02-04 18:31:38 +0100
commit084ee54552f6c35d740e8b9bc81a4fe8d8bb178b (patch)
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parent6ed14ff33979bc48367c35b1b235fef8c5e2229b (diff)
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PowerPC64 little-endian fixes: VSX tests and pseudo-regs
Many VSX test were failing on powerpc64le-linux, since -as opposed to the AltiVec tests- there never were little-endian versions of the test patterns. This patch adds such patterns, along the lines of altivec-regs.exp. In addition, there is an actual code change required: For those VSX registers that overlap a floating-point register, the FP register overlaps the most-significant half of the VSX register both on big- and little-endian systems. However, on little-endian systems, that half is stored at an offset of 8 bytes (not 0). This works already for the "real" FP registers, but current code gets it wrong for the "extended" pseudo FP register GDB generates for the second half of the VSX register bank. This patch updates the corresponding pseudo read/write routines to take the appropriate offset into consideration. gdb/ChangeLog: * rs6000-tdep.c (efpr_pseudo_register_read): Use correct offset of the overlapped FP register within the VSX register on little- endian platforms. (efpr_pseudo_register_write): Likewise. gdb/testsuite/ChangeLog: * gdb.arch/vsx-regs.exp: Check target endianness. Provide variants of the test patterns for use on little-endian systems.
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