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author | Jim Blandy <jimb@codesourcery.com> | 2004-05-10 17:07:02 +0000 |
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committer | Jim Blandy <jimb@codesourcery.com> | 2004-05-10 17:07:02 +0000 |
commit | c4143af614f9fdb6be35ad9e68711b197b63741b (patch) | |
tree | 2acd980986d06e79a3250949e5ed7da4e50b3b43 /gdb/ppc-linux-tdep.c | |
parent | 2e56e9c16fddf3a47ae0b3d053a9a9e3cd3ce3fb (diff) | |
download | gdb-c4143af614f9fdb6be35ad9e68711b197b63741b.zip gdb-c4143af614f9fdb6be35ad9e68711b197b63741b.tar.gz gdb-c4143af614f9fdb6be35ad9e68711b197b63741b.tar.bz2 |
* ppc-tdep.h (struct gdbarch_tdep): Change definition of
ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this
processor variant lacks those registers.
(ppc_floating_point_unit_p): Change description to make it clear
that this returns info about the ISA, not the ABI.
* rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to
return true or false by checking tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum. The original code replicated the BFD
arch/mach switching done in rs6000_gdbarch_init; it's better to
keep that logic there, and just check the results here.
(rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum to -1 to indicate that we have no
floating-point registers.
(ppc_supply_fpregset, ppc_collect_fpregset)
(rs6000_push_dummy_call, rs6000_extract_return_value)
(rs6000_store_return_value): Assert that we have floating-point
registers.
(rs6000_dwarf2_stab_reg_to_regnum): Add FIXME.
(rs6000_frame_cache): Don't note the locations at which
floating-point registers were saved if we have no fprs.
* aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP
registers.
(fetch_regs_user_thread, fetch_regs_kernel_thread)
(store_regs_user_thread, store_regs_kernel_thread): Only call
supply_fprs / fill_fprs if we actually have floating-point
registers.
(special_register_p): Check ppc_fpscr_regnum before matching
against it.
(supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't
supply / collect fpscr if we don't have it.
* ppc-bdm.c: #include "gdb_assert.h".
(bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we
have floating-point registers, since I can't test this code on
FP-free systems to adapt it.
* ppc-linux-nat.c (ppc_register_u_addr): Don't match against the
fpscr and floating point register numbers if they don't exist.
(fetch_register): Assert that we have floating-point registers
before we reach the code that handles them.
(store_register): Same. And use tdep instead of calling
gdbarch_tdep again.
(fill_fpregset): Don't try to collect FP registers and fpscr if we
don't have them.
(ppc_linux_sigtramp_cache): Don't record the saved locations of
fprs and fpscr if we don't have them.
(ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we
don't have them.
* ppcnbsd-nat.c: #include "gdb_assert.h".
(getfpregs_supplies): Assert that we have floating-point registers.
* ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same.
* ppcobsd-tdep.c: #include "gdb_assert.h".
(ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we
have floating-point registers.
* rs6000-nat.c (regmap): Don't match against the fpscr and
floating point register numbers if they don't exist.
(fetch_inferior_registers, store_inferior_registers,
fetch_core_registers): Only fetch / store / supply the
floating-point registers and the fpscr if we have them.
* Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o)
(ppcobsd-tdep.o): Update dependencies.
Diffstat (limited to 'gdb/ppc-linux-tdep.c')
-rw-r--r-- | gdb/ppc-linux-tdep.c | 23 |
1 files changed, 15 insertions, 8 deletions
diff --git a/gdb/ppc-linux-tdep.c b/gdb/ppc-linux-tdep.c index 94c67f1..49f4ad6 100644 --- a/gdb/ppc-linux-tdep.c +++ b/gdb/ppc-linux-tdep.c @@ -944,12 +944,16 @@ ppc_linux_sigtramp_cache (struct frame_info *next_frame, void **this_cache) cache->saved_regs[tdep->ppc_cr_regnum].addr = gpregs + 38 * tdep->wordsize; /* Floating point registers. */ - for (i = 0; i < 32; i++) + if (ppc_floating_point_unit_p (gdbarch)) { - int regnum = i + tdep->ppc_fp0_regnum; - cache->saved_regs[regnum].addr = fpregs + i * tdep->wordsize; + for (i = 0; i < ppc_num_fprs; i++) + { + int regnum = i + tdep->ppc_fp0_regnum; + cache->saved_regs[regnum].addr = fpregs + i * tdep->wordsize; + } + cache->saved_regs[tdep->ppc_fpscr_regnum].addr + = fpregs + 32 * tdep->wordsize; } - cache->saved_regs[tdep->ppc_fpscr_regnum].addr = fpregs + 32 * tdep->wordsize; return cache; } @@ -1018,15 +1022,18 @@ ppc_linux_supply_fpregset (const struct regset *regset, struct gdbarch_tdep *regcache_tdep = gdbarch_tdep (regcache_arch); const bfd_byte *buf = fpset; - for (regi = 0; regi < 32; regi++) + if (! ppc_floating_point_unit_p (regcache_arch)) + return; + + for (regi = 0; regi < ppc_num_fprs; regi++) regcache_raw_supply (regcache, regcache_tdep->ppc_fp0_regnum + regi, buf + 8 * regi); - /* The FPSCR is stored in the low order word of the last doubleword in the - fpregset. */ + /* The FPSCR is stored in the low order word of the last + doubleword in the fpregset. */ regcache_raw_supply (regcache, regcache_tdep->ppc_fpscr_regnum, - buf + 8 * 32 + 4); + buf + 8 * 32 + 4); } static struct regset ppc_linux_fpregset = { NULL, ppc_linux_supply_fpregset }; |