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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2017-12-20 13:59:14 +0100
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2017-12-20 13:59:14 +0100
commit396d3980f518cfc9a936e3fb8138b0492399525a (patch)
treead8c22608a21fd3eca3f73702feffcadf75e3463 /gdb/ppc-linux-tdep.c
parent175654b9cdd3113a01174b019ac286092398246b (diff)
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[Cell/B.E.] Fix regression due to gdbarch_significant_addr_bit
On Cell/B.E. multi-architecture debugging we use a "merged" address space that encodes both the main PowerPC address space and the local store address spaces of all active SPUs. This will always occupy 64 bits. However, gdbarch_addr_bit is set to 32 on SPU, and may be set to 32 as well on PowerPC. Since the new gdbarch_significant_addr_bit defaults to the value of gdbarch_addr_bit, this means addresses may be improperly truncated. Work around this problem by explicitly setting gdbarch_significant_addr_bit to 64 both for the SPU target and also for PowerPC target that support Cell/B.E. execution. gdb/ChangeLog: 2017-12-20 Ulrich Weigand <uweigand@de.ibm.com> * spu-tdep.c (spu_gdbarch_init): Set set_gdbarch_significant_addr_bit to 64 bits. (ppc_linux_init_abi): Likewise, if Cell/B.E. is supported.
Diffstat (limited to 'gdb/ppc-linux-tdep.c')
-rw-r--r--gdb/ppc-linux-tdep.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/gdb/ppc-linux-tdep.c b/gdb/ppc-linux-tdep.c
index 0e43a64..5120490 100644
--- a/gdb/ppc-linux-tdep.c
+++ b/gdb/ppc-linux-tdep.c
@@ -1809,6 +1809,10 @@ ppc_linux_init_abi (struct gdbarch_info info,
/* Cell/B.E. cross-architecture unwinder support. */
frame_unwind_prepend_unwinder (gdbarch, &ppu2spu_unwind);
+
+ /* We need to support more than "addr_bit" significant address bits
+ in order to support SPUADDR_ADDR encoded values. */
+ set_gdbarch_significant_addr_bit (gdbarch, 64);
}
set_gdbarch_displaced_step_location (gdbarch,