aboutsummaryrefslogtreecommitdiff
path: root/gdb/ppc-linux-nat.c
diff options
context:
space:
mode:
authorThiago Jung Bauermann <bauerman@br.ibm.com>2008-11-18 21:39:47 +0000
committerThiago Jung Bauermann <bauerman@br.ibm.com>2008-11-18 21:39:47 +0000
commit69abc51c172060b82b71123ca818062ee699099e (patch)
tree7b9dfcd8cdcfc942928f3473b063b34cf7c62db6 /gdb/ppc-linux-nat.c
parentc14c28ba117dee9fd0bf17fc3437e808221a7829 (diff)
downloadgdb-69abc51c172060b82b71123ca818062ee699099e.zip
gdb-69abc51c172060b82b71123ca818062ee699099e.tar.gz
gdb-69abc51c172060b82b71123ca818062ee699099e.tar.bz2
gdb/
* ppc-linux-nat.c (ppc_register_u_addr): Add special case to return offset for full 64-bit slot of FPSCR when in 32-bits. (ppc_linux_read_description): Return target description with 64-bit FPSCR when inferior is running on an ISA 2.05 or later processor. * ppc-linux-tdep.c (_initialize_ppc_linux_tdep): Call initialize_tdec_powerpc_isa205_32l, initialize_tdec_powerpc_isa205_altivec32l, initialize_tdec_powerpc_isa205_vsx32l, initialize_tdec_powerpc_isa205_64l, initialize_tdec_powerpc_isa205_altivec64l and initialize_tdec_powerpc_isa205_vsx64l. * ppc-linux-tdep.h: Add external declaration for tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l, tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_isa205_64l, tdesc_powerpc_isa205_altivec64l and tdesc_powerpc_isa205_vsx64l. * features/rs600/powerpc-fpu-isa205.xml: New file. * features/rs600/powerpc-isa205-32l.xml: New file. * features/rs600/powerpc-isa205-64l.xml: New file. * features/rs600/powerpc-isa205-altivec32l.xml: New file. * features/rs600/powerpc-isa205-altivec64l.xml: New file. * features/rs600/powerpc-isa205-vsx32l.xml: New file. * features/rs600/powerpc-isa205-vsx64l.xml: New file. * features/rs600/powerpc-isa205-32l.c: Generate. * features/rs600/powerpc-isa205-64l.c: Generate. * features/rs600/powerpc-isa205-altivec32l.c: Generate. * features/rs600/powerpc-isa205-altivec64l.c: Generate. * features/rs600/powerpc-isa205-vsx32l.c: Generate. * features/rs600/powerpc-isa205-vsx64l.c: Generate. gdb/testsuite/ * gdb.arch/ppc-dfp.exp: New file. * gdb.arch/ppc-dfp.c: New file.
Diffstat (limited to 'gdb/ppc-linux-nat.c')
-rw-r--r--gdb/ppc-linux-nat.c31
1 files changed, 24 insertions, 7 deletions
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c
index ed197f1..2e04828 100644
--- a/gdb/ppc-linux-nat.c
+++ b/gdb/ppc-linux-nat.c
@@ -56,9 +56,16 @@
#define PT_TRAP 40
#endif
+/* The PPC_FEATURE_* defines should be provided by <asm/cputable.h>.
+ If they aren't, we can provide them ourselves (their values are fixed
+ because they are part of the kernel ABI). They are used in the AT_HWCAP
+ entry of the AUXV. */
#ifndef PPC_FEATURE_BOOKE
#define PPC_FEATURE_BOOKE 0x00008000
#endif
+#ifndef PPC_FEATURE_ARCH_2_05
+#define PPC_FEATURE_ARCH_2_05 0x00001000 /* ISA 2.05 */
+#endif
/* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
configure time check. Some older glibc's (for instance 2.2.1)
@@ -274,11 +281,17 @@ ppc_register_u_addr (struct gdbarch *gdbarch, int regno)
kernel headers incorrectly contained the 32-bit definition of
PT_FPSCR. For the 32-bit definition, floating-point
registers occupy two 32-bit "slots", and the FPSCR lives in
- the secondhalf of such a slot-pair (hence +1). For 64-bit,
+ the second half of such a slot-pair (hence +1). For 64-bit,
the FPSCR instead occupies the full 64-bit 2-word-slot and
hence no adjustment is necessary. Hack around this. */
if (wordsize == 8 && PT_FPSCR == (48 + 32 + 1))
u_addr = (48 + 32) * wordsize;
+ /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
+ slot and not just its second word. The PT_FPSCR supplied when
+ GDB is compiled as a 32-bit app doesn't reflect this. */
+ else if (wordsize == 4 && register_size (gdbarch, regno) == 8
+ && PT_FPSCR == (48 + 2*32 + 1))
+ u_addr = (48 + 2*32) * wordsize;
else
u_addr = PT_FPSCR * wordsize;
}
@@ -1230,6 +1243,7 @@ ppc_linux_read_description (struct target_ops *ops)
{
int altivec = 0;
int vsx = 0;
+ int isa205 = 0;
int tid = TIDGET (inferior_ptid);
if (tid == 0)
@@ -1274,6 +1288,9 @@ ppc_linux_read_description (struct target_ops *ops)
perror_with_name (_("Unable to fetch AltiVec registers"));
}
+ if (ppc_linux_get_hwcap () & PPC_FEATURE_ARCH_2_05)
+ isa205 = 1;
+
/* Check for 64-bit inferior process. This is the case when the host is
64-bit, and in addition the top bit of the MSR register is set. */
#ifdef __powerpc64__
@@ -1284,21 +1301,21 @@ ppc_linux_read_description (struct target_ops *ops)
if (errno == 0 && msr < 0)
{
if (vsx)
- return tdesc_powerpc_vsx64l;
+ return isa205? tdesc_powerpc_isa205_vsx64l : tdesc_powerpc_vsx64l;
else if (altivec)
- return tdesc_powerpc_altivec64l;
+ return isa205? tdesc_powerpc_isa205_altivec64l : tdesc_powerpc_altivec64l;
- return tdesc_powerpc_64l;
+ return isa205? tdesc_powerpc_isa205_64l : tdesc_powerpc_64l;
}
}
#endif
if (vsx)
- return tdesc_powerpc_vsx32l;
+ return isa205? tdesc_powerpc_isa205_vsx32l : tdesc_powerpc_vsx32l;
else if (altivec)
- return tdesc_powerpc_altivec32l;
+ return isa205? tdesc_powerpc_isa205_altivec32l : tdesc_powerpc_altivec32l;
- return tdesc_powerpc_32l;
+ return isa205? tdesc_powerpc_isa205_32l : tdesc_powerpc_32l;
}
void _initialize_ppc_linux_nat (void);