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author | Michael Snyder <msnyder@vmware.com> | 2011-02-26 02:07:10 +0000 |
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committer | Michael Snyder <msnyder@vmware.com> | 2011-02-26 02:07:10 +0000 |
commit | b021a2216627b2a56696125ff8a28985aae605e3 (patch) | |
tree | b92fc609e8c9fd438b095e35eaf94416ddb85cb8 /gdb/ppc-linux-nat.c | |
parent | 80549d04a2090e1c1a6a693485f577f9e45dcacc (diff) | |
download | gdb-b021a2216627b2a56696125ff8a28985aae605e3.zip gdb-b021a2216627b2a56696125ff8a28985aae605e3.tar.gz gdb-b021a2216627b2a56696125ff8a28985aae605e3.tar.bz2 |
2011-02-25 Michael Snyder <msnyder@vmware.com>
* arm-tdep.c: Fix typos in comments.
* bsd-uthread.c: Ditto.
* completer.c: Ditto.
* corelow.c: Ditto.
* cp-namespace.c: Ditto.
* cp-support.c: Ditto.
* cris-tdep.c: Ditto.
* dbxread.c: Ditto.
* dwarf2read.c: Ditto.
* frame.h: Ditto.
* gdbtypes.h: Ditto.
* inferior.h: Ditto.
* mdebugread.c: Ditto.
* mips-tdep.c: Ditto.
* ppc-linux-nat.c: Ditto.
* ppc-linux-tdep.c: Ditto.
* printcmd.c: Ditto.
* sol-thread.c: Ditto.
* solib-frv.c: Ditto.
* solist.h: Ditto.
* sparc64-tdep.c: Ditto.
* spu-tdep.c: Ditto.
* stabsread.c: Ditto.
* symfile.c: Ditto.
* valops.c: Ditto.
* varobj.c: Ditto.
* vax-nat.c: Ditto.
* python/py-block.c: Ditto.
* python/py-symbol.c: Ditto.
* python/py-symtab.c: Ditto.
* python/py-value.c: Ditto.
* tui/tui-win.c: Ditto.
Diffstat (limited to 'gdb/ppc-linux-nat.c')
-rw-r--r-- | gdb/ppc-linux-nat.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c index 0c5563e..049cde8 100644 --- a/gdb/ppc-linux-nat.c +++ b/gdb/ppc-linux-nat.c @@ -264,7 +264,7 @@ typedef char gdb_vrregset_t[SIZEOF_VRREGS]; typedef char gdb_vsxregset_t[SIZEOF_VSXREGS]; -/* On PPC processors that support the the Signal Processing Extension +/* On PPC processors that support the Signal Processing Extension (SPE) APU, the general-purpose registers are 64 bits long. However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER ptrace calls only access the lower half of each register, to allow @@ -275,7 +275,7 @@ typedef char gdb_vsxregset_t[SIZEOF_VSXREGS]; GDB itself continues to claim the general-purpose registers are 32 bits long. It has unnamed raw registers that hold the upper halves - of the gprs, and the the full 64-bit SIMD views of the registers, + of the gprs, and the full 64-bit SIMD views of the registers, 'ev0' -- 'ev31', are pseudo-registers that splice the top and bottom halves together. |