diff options
author | Jim Blandy <jimb@codesourcery.com> | 2004-05-05 01:46:55 +0000 |
---|---|---|
committer | Jim Blandy <jimb@codesourcery.com> | 2004-05-05 01:46:55 +0000 |
commit | 366f009f23b0e5fc1668d1f728b4cda533df5cb5 (patch) | |
tree | 6a4f33eea5a1504c1169b4f9e7d0f7bff0dca852 /gdb/ppc-linux-nat.c | |
parent | e792b4ce88267ea6d1fc66defae56f8dc8d4c05d (diff) | |
download | gdb-366f009f23b0e5fc1668d1f728b4cda533df5cb5.zip gdb-366f009f23b0e5fc1668d1f728b4cda533df5cb5.tar.gz gdb-366f009f23b0e5fc1668d1f728b4cda533df5cb5.tar.bz2 |
* config/rs6000/tm-rs6000.h (FP0_REGNUM): Document that this
should no longer be used in code specific to the RS6000 and its
derivatives.
* ppc-tdep.h (struct gdbarch_tdep): Add 'ppc_fp0_regnum' member.
* rs6000-tdep.c (rs6000_gdbarch_init): Initialize
tdep->ppc_fp0_regnum.
(ppc_supply_fpregset, ppc_collect_fpregset)
(rs6000_push_dummy_call, rs6000_extract_return_value)
(rs6000_dwarf2_stab_reg_to_regnum, rs6000_store_return_value)
(rs6000_frame_cache): Use tdep->ppc_fp0_regnum instead of
FP0_REGNUM.
* aix-thread.c (supply_fprs, fetch_regs_kernel_thread)
(fill_gprs64, fill_gprs32, fill_fprs, store_regs_kernel_thread):
Same.
* ppc-bdm.c (bdm_ppc_fetch_registers, bdm_ppc_fetch_registers,
bdm_ppc_store_registers): Same.
* ppc-linux-nat.c (ppc_register_u_addr, fetch_register)
(store_register, fill_fpregset): Same.
* ppc-linux-tdep.c (ppc_linux_sigtramp_cache)
(ppc_linux_supply_fpregset): Same.
* ppcnbsd-nat.c (getfpregs_supplies): Same.
* ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg):
Same.
* ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call,
do_ppc_sysv_return_value, ppc64_sysv_abi_push_dummy_call,
ppc64_sysv_abi_return_value): Same.
* rs6000-nat.c (regmap, fetch_inferior_registers)
(store_inferior_registers, fetch_core_registers): Same.
Diffstat (limited to 'gdb/ppc-linux-nat.c')
-rw-r--r-- | gdb/ppc-linux-nat.c | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c index fc8508d..b6dbbc9 100644 --- a/gdb/ppc-linux-nat.c +++ b/gdb/ppc-linux-nat.c @@ -139,8 +139,9 @@ ppc_register_u_addr (int regno) /* Floating point regs: eight bytes each in both 32- and 64-bit ptrace interfaces. Thus, two slots each in 32-bit interface, one slot each in 64-bit interface. */ - if (regno >= FP0_REGNUM && regno < FP0_REGNUM + ppc_num_fprs) - u_addr = (PT_FPR0 * wordsize) + ((regno - FP0_REGNUM) * 8); + if (regno >= tdep->ppc_fp0_regnum + && regno < tdep->ppc_fp0_regnum + ppc_num_fprs) + u_addr = (PT_FPR0 * wordsize) + ((regno - tdep->ppc_fp0_regnum) * 8); /* UISA special purpose registers: 1 slot each */ if (regno == PC_REGNUM) @@ -202,6 +203,7 @@ fetch_altivec_register (int tid, int regno) static void fetch_register (int tid, int regno) { + struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); /* This isn't really an address. But ptrace thinks of it as one. */ char mess[128]; /* For messages */ int i; @@ -251,7 +253,8 @@ fetch_register (int tid, int regno) /* Now supply the register. Be careful to map between ptrace's and the current_regcache's idea of the current wordsize. */ - if ((regno >= FP0_REGNUM && regno < FP0_REGNUM +32) + if ((regno >= tdep->ppc_fp0_regnum + && regno < tdep->ppc_fp0_regnum + ppc_num_fprs) || gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) /* FPs are always 64 bits. Little endian values are always found at the left-hand end of the register. */ @@ -376,6 +379,7 @@ store_altivec_register (int tid, int regno) static void store_register (int tid, int regno) { + struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); /* This isn't really an address. But ptrace thinks of it as one. */ CORE_ADDR regaddr = ppc_register_u_addr (regno); char mess[128]; /* For messages */ @@ -395,7 +399,8 @@ store_register (int tid, int regno) /* First collect the register value from the regcache. Be careful to to convert the regcache's wordsize into ptrace's wordsize. */ memset (buf, 0, sizeof buf); - if ((regno >= FP0_REGNUM && regno < FP0_REGNUM + 32) + if ((regno >= tdep->ppc_fp0_regnum + && regno < tdep->ppc_fp0_regnum + ppc_num_fprs) || TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) /* Floats are always 64-bit. Little endian registers are always at the left-hand end of the register cache. */ @@ -585,8 +590,8 @@ fill_fpregset (gdb_fpregset_t *fpregsetp, int regno) for (regi = 0; regi < 32; regi++) { - if ((regno == -1) || (regno == FP0_REGNUM + regi)) - regcache_collect (FP0_REGNUM + regi, fpp + 8 * regi); + if ((regno == -1) || (regno == tdep->ppc_fp0_regnum + regi)) + regcache_collect (tdep->ppc_fp0_regnum + regi, fpp + 8 * regi); } if ((regno == -1) || regno == tdep->ppc_fpscr_regnum) right_fill_reg (tdep->ppc_fpscr_regnum, (fpp + 8 * 32)); |