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authorDavid Carlton <carlton@bactrian.org>2003-06-27 21:50:37 +0000
committerDavid Carlton <carlton@bactrian.org>2003-06-27 21:50:37 +0000
commit3abe3bc90be798445086f45d9c3723165cc6c893 (patch)
tree20de3690d32dbb68a1e4266dfd13575be97ea40e /gdb/ppc-linux-nat.c
parentc8a2fad7b41a8264964233608ae10c35918243fb (diff)
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2003-06-27 David Carlton <carlton@kealia.com>
* Merge with mainline; tag is carlton_dictionary-20030627-merge.
Diffstat (limited to 'gdb/ppc-linux-nat.c')
-rw-r--r--gdb/ppc-linux-nat.c33
1 files changed, 20 insertions, 13 deletions
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c
index 20c8add..d0bff2e 100644
--- a/gdb/ppc-linux-nat.c
+++ b/gdb/ppc-linux-nat.c
@@ -127,32 +127,37 @@ ppc_register_u_addr (int regno)
{
int u_addr = -1;
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ int wordsize = tdep->wordsize;
/* General purpose registers occupy 1 slot each in the buffer */
if (regno >= tdep->ppc_gp0_regnum && regno <= tdep->ppc_gplast_regnum )
- u_addr = ((PT_R0 + regno) * 4);
+ u_addr = ((PT_R0 + regno) * wordsize);
- /* Floating point regs: 2 slots each */
+ /* Floating point regs: eight bytes each in both 32- and 64-bit
+ ptrace interfaces. Thus, two slots each in 32-bit interface, one
+ slot each in 64-bit interface. */
if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM)
- u_addr = ((PT_FPR0 + (regno - FP0_REGNUM) * 2) * 4);
+ u_addr = (PT_FPR0 * wordsize) + ((regno - FP0_REGNUM) * 8);
/* UISA special purpose registers: 1 slot each */
if (regno == PC_REGNUM)
- u_addr = PT_NIP * 4;
+ u_addr = PT_NIP * wordsize;
if (regno == tdep->ppc_lr_regnum)
- u_addr = PT_LNK * 4;
+ u_addr = PT_LNK * wordsize;
if (regno == tdep->ppc_cr_regnum)
- u_addr = PT_CCR * 4;
+ u_addr = PT_CCR * wordsize;
if (regno == tdep->ppc_xer_regnum)
- u_addr = PT_XER * 4;
+ u_addr = PT_XER * wordsize;
if (regno == tdep->ppc_ctr_regnum)
- u_addr = PT_CTR * 4;
+ u_addr = PT_CTR * wordsize;
+#ifdef PT_MQ
if (regno == tdep->ppc_mq_regnum)
- u_addr = PT_MQ * 4;
+ u_addr = PT_MQ * wordsize;
+#endif
if (regno == tdep->ppc_ps_regnum)
- u_addr = PT_MSR * 4;
+ u_addr = PT_MSR * wordsize;
if (regno == tdep->ppc_fpscr_regnum)
- u_addr = PT_FPSCR * 4;
+ u_addr = PT_FPSCR * wordsize;
return u_addr;
}
@@ -426,7 +431,7 @@ store_altivec_registers (int tid)
int ret;
gdb_vrregset_t regs;
- ret = ptrace (PTRACE_GETVRREGS, tid, 0, (int) &regs);
+ ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
if (ret < 0)
{
if (errno == EIO)
@@ -439,7 +444,7 @@ store_altivec_registers (int tid)
fill_vrregset (&regs);
- if (ptrace (PTRACE_SETVRREGS, tid, 0, (int) &regs) < 0)
+ if (ptrace (PTRACE_SETVRREGS, tid, 0, &regs) < 0)
perror_with_name ("Couldn't write AltiVec registers");
}
@@ -503,9 +508,11 @@ fill_gregset (gdb_gregset_t *gregsetp, int regno)
regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER);
if ((regno == -1) || regno == tdep->ppc_ctr_regnum)
regcache_collect (tdep->ppc_ctr_regnum, regp + PT_CTR);
+#ifdef PT_MQ
if (((regno == -1) || regno == tdep->ppc_mq_regnum)
&& (tdep->ppc_mq_regnum != -1))
regcache_collect (tdep->ppc_mq_regnum, regp + PT_MQ);
+#endif
if ((regno == -1) || regno == tdep->ppc_ps_regnum)
regcache_collect (tdep->ppc_ps_regnum, regp + PT_MSR);
}