aboutsummaryrefslogtreecommitdiff
path: root/gdb/nat/ppc-linux.c
diff options
context:
space:
mode:
authorYao Qi <yao@codesourcery.com>2014-11-28 09:18:26 +0800
committerYao Qi <yao@codesourcery.com>2015-01-14 22:28:27 +0800
commitcdf436294f7e0e3bd7668a81dfd5922fdd1aec14 (patch)
tree2a803f3df75a4a250135628b55022d2ff0d542be /gdb/nat/ppc-linux.c
parent514c533895543e246eea1771ea67f3c3486006a4 (diff)
downloadgdb-cdf436294f7e0e3bd7668a81dfd5922fdd1aec14.zip
gdb-cdf436294f7e0e3bd7668a81dfd5922fdd1aec14.tar.gz
gdb-cdf436294f7e0e3bd7668a81dfd5922fdd1aec14.tar.bz2
Detect 64-bit-ness in PowerPC Book III-E
This patch is to teach both GDB and GDBServer to detect 64-bit inferior correctly. We find a problem that GDBServer is unable to detect on a e5500 core processor. Current GDBServer assumes that MSR is a 64-bit register, but MSR is a 32-bit register in Book III-E. This patch is to fix this problem by checking the right bit in MSR, in order to handle both Book III-S and Book III-E. In order to detect Book III-S and Book III-E, we check the PPC_FEATURE_BOOKE from the host's HWCAP (by getauxval on glibc >= 2.16. If getauxval doesn't exist, we implement the fallback by parsing /proc/self/auxv), because it should an invariant on the same machine cross different processes. In order to share code, I add nat/ppc-linux.c for both GDB and GDBserver side. gdb: 2015-01-14 Yao Qi <yao@codesourcery.com> * Makefile.in (ppc-linux.o): New rule. * config/powerpc/ppc64-linux.mh (NATDEPFILES): Add ppc-linux.o. * configure.ac: AC_CHECK_FUNCS(getauxval). * config.in: Re-generated. * configure: Re-generated. * nat/ppc-linux.h [__powerpc64__] (ppc64_64bit_inferior_p): Declare. * nat/ppc-linux.c: New file. * ppc-linux-nat.c (ppc_linux_target_wordsize) [__powerpc64__]: Call ppc64_64bit_inferior_p. gdb/gdbserver: 2015-01-14 Yao Qi <yao@codesourcery.com> * Makefile.in (SFILES): Add nat/ppc-linux.c. (ppc-linux.o): New rule. * configure.srv (powerpc*-*-linux*): Add ppc-linux.o. * configure.ac: AC_CHECK_FUNCS(getauxval). * config.in: Re-generated. * configure: Re-generated. * linux-ppc-low.c (ppc_arch_setup) [__powerpc64__]: Call ppc64_64bit_inferior_p
Diffstat (limited to 'gdb/nat/ppc-linux.c')
-rw-r--r--gdb/nat/ppc-linux.c75
1 files changed, 75 insertions, 0 deletions
diff --git a/gdb/nat/ppc-linux.c b/gdb/nat/ppc-linux.c
new file mode 100644
index 0000000..76b3574
--- /dev/null
+++ b/gdb/nat/ppc-linux.c
@@ -0,0 +1,75 @@
+/*Copyright (C) 2015 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "common-defs.h"
+#include "ppc-linux.h"
+#include <elf.h>
+
+#ifdef HAVE_GETAUXVAL
+#include <sys/auxv.h>
+#endif
+
+#ifdef __powerpc64__
+
+/* Get the HWCAP from the process of GDB or GDBserver. If success,
+ save it in *VALP. */
+
+static void
+ppc64_host_hwcap (unsigned long *valp)
+{
+#ifdef HAVE_GETAUXVAL
+ *valp = getauxval (AT_HWCAP);
+#else
+ unsigned long data[2];
+ FILE *f = fopen ("/proc/self/auxv", "r");
+
+ if (f == NULL)
+ return;
+
+ while (fread (data, sizeof (data), 1, f) > 0)
+ {
+ if (data[0] == AT_HWCAP)
+ {
+ *valp = data[1];
+ break;
+ }
+ }
+
+ fclose (f);
+#endif /* HAVE_GETAUXVAL */
+}
+
+int
+ppc64_64bit_inferior_p (long msr)
+{
+ unsigned long ppc_host_hwcap = 0;
+
+ /* Get host's HWCAP to check whether the machine is Book E. */
+ ppc64_host_hwcap (&ppc_host_hwcap);
+
+ /* We actually have a 64-bit inferior only if the certain bit of the
+ MSR is set. The PowerISA Book III-S MSR is different from the
+ PowerISA Book III-E MSR. The Book III-S MSR is 64 bits wide, and
+ its MSR[SF] is the bit 0 of a 64-bit value. Book III-E MSR is 32
+ bits wide, and its MSR[CM] is the bit 0 of a 32-bit value. */
+ if (ppc_host_hwcap & PPC_FEATURE_BOOKE)
+ return msr & 0x80000000;
+ else
+ return msr < 0;
+}
+
+#endif