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authorHui Li <lihui@loongson.cn>2024-06-11 19:21:26 +0800
committerTiezhu Yang <yangtiezhu@loongson.cn>2024-06-25 05:50:29 +0800
commit6ced1278fc0078022f73d623702cf4582750f783 (patch)
treed6cf7eb15ee11a375fac83a29e1ddc20c845577a /gdb/nat/loongarch-hw-point.h
parentc1cdee0e2c1715718c1e6224038096142ccabe40 (diff)
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gdb: LoongArch: Add support for hardware breakpoint
LoongArch defines hardware watchpoint functions for fetch operations. After the software configures the watchpoints for fetch, the processor hardware will monitor the access addresses of the fetch operations and trigger a watchpoint exception when the watchpoint setting conditions are met. Hardware watchpoints for fetch operations is used to implement hardware breakpoint function on LoongArch. Refer to the following document for hardware breakpoint. https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#control-and-status-registers-related-to-watchpoints A simple test is as follows: lihui@bogon:~$ cat test.c #include <stdio.h> int a = 0; int main() { printf("start test\n"); a = 1; printf("a = %d\n", a); printf("end test\n"); return 0; } lihui@bogon:~$ gcc -g test.c -o test without this patch: lihui@bogon:~$ gdb test ... (gdb) start ... Temporary breakpoint 1, main () at test.c:5 5 printf("start test\n"); (gdb) hbreak 8 No hardware breakpoint support in the target. with this patch: lihui@bogon:~$ gdb test ... (gdb) start ... Temporary breakpoint 1, main () at test.c:5 5 printf("start test\n"); (gdb) hbreak 8 Hardware assisted breakpoint 2 at 0x1200006ec: file test.c, line 8. (gdb) c Continuing. start test a = 1 Breakpoint 2, main () at test.c:8 8 printf("end test\n"); (gdb) c Continuing. end test [Inferior 1 (process 25378) exited normally] Signed-off-by: Hui Li <lihui@loongson.cn> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Diffstat (limited to 'gdb/nat/loongarch-hw-point.h')
-rw-r--r--gdb/nat/loongarch-hw-point.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/gdb/nat/loongarch-hw-point.h b/gdb/nat/loongarch-hw-point.h
index 86e5aa3..fd79285 100644
--- a/gdb/nat/loongarch-hw-point.h
+++ b/gdb/nat/loongarch-hw-point.h
@@ -33,6 +33,7 @@
Neither of these values may exceed the width of dr_changed_t
measured in bits. */
+#define LOONGARCH_HBP_MAX_NUM 8
#define LOONGARCH_HWP_MAX_NUM 8
@@ -53,12 +54,18 @@
struct loongarch_debug_reg_state
{
+ /* hardware breakpoint */
+ CORE_ADDR dr_addr_bp[LOONGARCH_HBP_MAX_NUM];
+ unsigned int dr_ctrl_bp[LOONGARCH_HBP_MAX_NUM];
+ unsigned int dr_ref_count_bp[LOONGARCH_HBP_MAX_NUM];
+
/* hardware watchpoint */
CORE_ADDR dr_addr_wp[LOONGARCH_HWP_MAX_NUM];
unsigned int dr_ctrl_wp[LOONGARCH_HWP_MAX_NUM];
unsigned int dr_ref_count_wp[LOONGARCH_HWP_MAX_NUM];
};
+extern int loongarch_num_bp_regs;
extern int loongarch_num_wp_regs;
/* Invoked when IDXth breakpoint/watchpoint register pair needs to be
@@ -68,6 +75,10 @@ void loongarch_notify_debug_reg_change (ptid_t ptid, int is_watchpoint,
unsigned int idx);
+int loongarch_handle_breakpoint (enum target_hw_bp_type type, CORE_ADDR addr,
+ int len, int is_insert, ptid_t ptid,
+ struct loongarch_debug_reg_state *state);
+
int loongarch_handle_watchpoint (enum target_hw_bp_type type, CORE_ADDR addr,
int len, int is_insert, ptid_t ptid,
struct loongarch_debug_reg_state *state);