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| author | Yao Qi <yao.qi@linaro.org> | 2015-07-21 16:33:41 +0100 |
|---|---|---|
| committer | Yao Qi <yao.qi@linaro.org> | 2015-07-21 16:33:41 +0100 |
| commit | af1b22f3004774f8c5c570abe7fab629026032f7 (patch) | |
| tree | d24e1ef9ca80f1b62c1e08c75bffbac865cf792e /gdb/nat/aarch64-linux-hw-point.c | |
| parent | 40e050d242199ac67803c155ac2062169e5cf53d (diff) | |
| download | gdb-af1b22f3004774f8c5c570abe7fab629026032f7.zip gdb-af1b22f3004774f8c5c570abe7fab629026032f7.tar.gz gdb-af1b22f3004774f8c5c570abe7fab629026032f7.tar.bz2 | |
Move aarch64_linux_get_debug_reg_capacity to nat/aarch64-linux-hw-point.c
There are also some duplication on getting HW watchpoint/breakpoint
registers info between GDB and GDBserver. This patch moves them
to nat/aarch64-linux-hw-point.c.
Note that ENABLE_NLS is not defined in GDBserver, so it should be OK
to use _( markup.
gdb:
2015-07-21 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_get_debug_reg_capacity):
Move it to nat/aarch64-linux-hw-point.c.
(aarch64_linux_child_post_startup_inferior): Update.
* nat/aarch64-linux-hw-point.c (aarch64_linux_get_debug_reg_capacity):
New function.
* nat/aarch64-linux-hw-point.h (aarch64_linux_get_debug_reg_capacity):
Declare it.
gdb/gdbserver:
2015-07-21 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_arch_setup): Remove code and call
aarch64_linux_get_debug_reg_capacity.
Diffstat (limited to 'gdb/nat/aarch64-linux-hw-point.c')
| -rw-r--r-- | gdb/nat/aarch64-linux-hw-point.c | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/gdb/nat/aarch64-linux-hw-point.c b/gdb/nat/aarch64-linux-hw-point.c index f58e0c5..1d9664e 100644 --- a/gdb/nat/aarch64-linux-hw-point.c +++ b/gdb/nat/aarch64-linux-hw-point.c @@ -504,3 +504,56 @@ aarch64_show_debug_reg_state (struct aarch64_debug_reg_state *state, i, core_addr_to_string_nz (state->dr_addr_wp[i]), state->dr_ctrl_wp[i], state->dr_ref_count_wp[i]); } + +/* Get the hardware debug register capacity information from the + process represented by TID. */ + +void +aarch64_linux_get_debug_reg_capacity (int tid) +{ + struct iovec iov; + struct user_hwdebug_state dreg_state; + + iov.iov_base = &dreg_state; + iov.iov_len = sizeof (dreg_state); + + /* Get hardware watchpoint register info. */ + if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_HW_WATCH, &iov) == 0 + && AARCH64_DEBUG_ARCH (dreg_state.dbg_info) == AARCH64_DEBUG_ARCH_V8) + { + aarch64_num_wp_regs = AARCH64_DEBUG_NUM_SLOTS (dreg_state.dbg_info); + if (aarch64_num_wp_regs > AARCH64_HWP_MAX_NUM) + { + warning (_("Unexpected number of hardware watchpoint registers" + " reported by ptrace, got %d, expected %d."), + aarch64_num_wp_regs, AARCH64_HWP_MAX_NUM); + aarch64_num_wp_regs = AARCH64_HWP_MAX_NUM; + } + } + else + { + warning (_("Unable to determine the number of hardware watchpoints" + " available.")); + aarch64_num_wp_regs = 0; + } + + /* Get hardware breakpoint register info. */ + if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_HW_BREAK, &iov) == 0 + && AARCH64_DEBUG_ARCH (dreg_state.dbg_info) == AARCH64_DEBUG_ARCH_V8) + { + aarch64_num_bp_regs = AARCH64_DEBUG_NUM_SLOTS (dreg_state.dbg_info); + if (aarch64_num_bp_regs > AARCH64_HBP_MAX_NUM) + { + warning (_("Unexpected number of hardware breakpoint registers" + " reported by ptrace, got %d, expected %d."), + aarch64_num_bp_regs, AARCH64_HBP_MAX_NUM); + aarch64_num_bp_regs = AARCH64_HBP_MAX_NUM; + } + } + else + { + warning (_("Unable to determine the number of hardware breakpoints" + " available.")); + aarch64_num_bp_regs = 0; + } +} |