aboutsummaryrefslogtreecommitdiff
path: root/gdb/moxie-tdep.c
diff options
context:
space:
mode:
authorSimon Marchi <simon.marchi@polymtl.ca>2017-05-02 13:30:07 -0400
committerSimon Marchi <simon.marchi@ericsson.com>2017-05-02 13:30:07 -0400
commita0ff9e1ad221c11f58a9d8d12a84c21579132d85 (patch)
treea3fc20fdc0445a738432cf73ac65d4d4616c4b65 /gdb/moxie-tdep.c
parentea480a306d46efe3dd1839618137f0e73a80e9b3 (diff)
downloadgdb-a0ff9e1ad221c11f58a9d8d12a84c21579132d85.zip
gdb-a0ff9e1ad221c11f58a9d8d12a84c21579132d85.tar.gz
gdb-a0ff9e1ad221c11f58a9d8d12a84c21579132d85.tar.bz2
Change return type of gdbarch_software_single_step to vector<CORE_ADDR>
This is a relatively straightforward patch that changes gdbarch_software_single_step so it returns an std::vector<CORE_ADDR> instead of a VEC (CORE_ADDR). gdb/ChangeLog: * gdbarch.sh (software_single_step): Change return type to std::vector<CORE_ADDR>. * gdbarch.c, gdbarch.h: Re-generate. * arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw): Adjust. (arm_deal_with_atomic_sequence_raw): Adjust. (thumb_get_next_pcs_raw): Adjust. (arm_get_next_pcs_raw): Adjust. (arm_get_next_pcs): Adjust. * arch/arm-get-next-pcs.h (arm_get_next_pcs): Adjust. * aarch64-tdep.c (aarch64_software_single_step): Adjust. * alpha-tdep.c (alpha_deal_with_atomic_sequence): Adjust. (alpha_software_single_step): Adjust. * alpha-tdep.h (alpha_software_single_step): Adjust. * arm-linux-tdep.c (arm_linux_software_single_step): Adjust. * arm-tdep.c (arm_software_single_step): Adjust. (arm_breakpoint_kind_from_current_state): Adjust. * arm-tdep.h (arm_software_single_step): Adjust. * breakpoint.c (insert_single_step_breakpoint): Adjust. * cris-tdep.c (cris_software_single_step): Adjust. * mips-tdep.c (mips_deal_with_atomic_sequence): Adjust. (micromips_deal_with_atomic_sequence): Adjust. (deal_with_atomic_sequence): Adjust. (mips_software_single_step): Adjust. * mips-tdep.h (mips_software_single_step): Adjust. * moxie-tdep.c (moxie_software_single_step): Adjust. * nios2-tdep.c (nios2_software_single_step): Adjust. * ppc-tdep.h (ppc_deal_with_atomic_sequence): Adjust. * rs6000-aix-tdep.c (rs6000_software_single_step): Adjust. * rs6000-tdep.c (ppc_deal_with_atomic_sequence): Adjust. * s390-linux-tdep.c (s390_software_single_step): Adjust. * sparc-tdep.c (sparc_software_single_step): Adjust. * spu-tdep.c (spu_software_single_step): Adjust. * tic6x-tdep.c (tic6x_software_single_step): Adjust. gdb/gdbserver/ChangeLog: * linux-arm-low.c (arm_gdbserver_get_next_pcs): Adjust to software_single_step change of return type to std::vector<CORE_ADDR>. * linux-low.c (install_software_single_step_breakpoints): Likewise. * linux-low.h (install_software_single_step_breakpoints): Likewise.
Diffstat (limited to 'gdb/moxie-tdep.c')
-rw-r--r--gdb/moxie-tdep.c26
1 files changed, 12 insertions, 14 deletions
diff --git a/gdb/moxie-tdep.c b/gdb/moxie-tdep.c
index dd7a6f4..2972d52 100644
--- a/gdb/moxie-tdep.c
+++ b/gdb/moxie-tdep.c
@@ -299,7 +299,7 @@ moxie_process_readu (CORE_ADDR addr, gdb_byte *buf,
/* Insert a single step breakpoint. */
-static VEC (CORE_ADDR) *
+static std::vector<CORE_ADDR>
moxie_software_single_step (struct regcache *regcache)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
@@ -309,7 +309,7 @@ moxie_software_single_step (struct regcache *regcache)
uint32_t tmpu32;
ULONGEST fp;
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- VEC (CORE_ADDR) *next_pcs = NULL;
+ std::vector<CORE_ADDR> next_pcs;
addr = regcache_read_pc (regcache);
@@ -337,9 +337,8 @@ moxie_software_single_step (struct regcache *regcache)
case 0x09: /* bleu */
/* Insert breaks on both branches, because we can't currently tell
which way things will go. */
- VEC_safe_push (CORE_ADDR, next_pcs, addr + 2);
- VEC_safe_push (CORE_ADDR, next_pcs,
- addr + 2 + INST2OFFSET(inst));
+ next_pcs.push_back (addr + 2);
+ next_pcs.push_back (addr + 2 + INST2OFFSET(inst));
break;
default:
{
@@ -351,7 +350,7 @@ moxie_software_single_step (struct regcache *regcache)
else
{
/* This is a Form 2 instruction. They are all 16 bits. */
- VEC_safe_push (CORE_ADDR, next_pcs, addr + 2);
+ next_pcs.push_back (addr + 2);
}
}
else
@@ -398,7 +397,7 @@ moxie_software_single_step (struct regcache *regcache)
case 0x32: /* udiv.l */
case 0x33: /* mod.l */
case 0x34: /* umod.l */
- VEC_safe_push (CORE_ADDR, next_pcs, addr + 2);
+ next_pcs.push_back (addr + 2);
break;
/* 32-bit instructions. */
@@ -408,7 +407,7 @@ moxie_software_single_step (struct regcache *regcache)
case 0x37: /* sto.b */
case 0x38: /* ldo.s */
case 0x39: /* sto.s */
- VEC_safe_push (CORE_ADDR, next_pcs, addr + 4);
+ next_pcs.push_back (addr + 4);
break;
/* 48-bit instructions. */
@@ -421,27 +420,26 @@ moxie_software_single_step (struct regcache *regcache)
case 0x20: /* ldi.s (immediate) */
case 0x22: /* lda.s */
case 0x24: /* sta.s */
- VEC_safe_push (CORE_ADDR, next_pcs, addr + 6);
+ next_pcs.push_back (addr + 6);
break;
/* Control flow instructions. */
case 0x03: /* jsra */
case 0x1a: /* jmpa */
- VEC_safe_push (CORE_ADDR, next_pcs,
- moxie_process_readu (addr + 2, buf, 4, byte_order));
+ next_pcs.push_back (moxie_process_readu (addr + 2, buf, 4,
+ byte_order));
break;
case 0x04: /* ret */
regcache_cooked_read_unsigned (regcache, MOXIE_FP_REGNUM, &fp);
- VEC_safe_push (CORE_ADDR, next_pcs,
- moxie_process_readu (fp + 4, buf, 4, byte_order));
+ next_pcs.push_back (moxie_process_readu (fp + 4, buf, 4, byte_order));
break;
case 0x19: /* jsr */
case 0x25: /* jmp */
regcache_raw_read (regcache,
(inst >> 4) & 0xf, (gdb_byte *) & tmpu32);
- VEC_safe_push (CORE_ADDR, next_pcs, tmpu32);
+ next_pcs.push_back (tmpu32);
break;
case 0x30: /* swi */