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author | Stan Shebs <shebs@codesourcery.com> | 1999-04-16 01:35:26 +0000 |
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committer | Stan Shebs <shebs@codesourcery.com> | 1999-04-16 01:35:26 +0000 |
commit | c906108c21474dfb4ed285bcc0ac6fe02cd400cc (patch) | |
tree | a0015aa5cedc19ccbab307251353a41722a3ae13 /gdb/mipsv4-nat.c | |
parent | cd946cff9ede3f30935803403f06f6ed30cad136 (diff) | |
download | gdb-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.zip gdb-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.tar.gz gdb-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.tar.bz2 |
Initial creation of sourceware repositorygdb-4_18-branchpoint
Diffstat (limited to 'gdb/mipsv4-nat.c')
-rw-r--r-- | gdb/mipsv4-nat.c | 159 |
1 files changed, 159 insertions, 0 deletions
diff --git a/gdb/mipsv4-nat.c b/gdb/mipsv4-nat.c new file mode 100644 index 0000000..df4b6e9 --- /dev/null +++ b/gdb/mipsv4-nat.c @@ -0,0 +1,159 @@ +/* Native support for MIPS running SVR4, for GDB. + Copyright 1994, 1995 Free Software Foundation, Inc. + +This file is part of GDB. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "defs.h" +#include "inferior.h" +#include "gdbcore.h" +#include "target.h" + +#include <sys/time.h> +#include <sys/procfs.h> +#include <setjmp.h> /* For JB_XXX. */ + +/* Size of elements in jmpbuf */ + +#define JB_ELEMENT_SIZE 4 + +/* + * See the comment in m68k-tdep.c regarding the utility of these functions. + * + * These definitions are from the MIPS SVR4 ABI, so they may work for + * any MIPS SVR4 target. + */ + +void +supply_gregset (gregsetp) + gregset_t *gregsetp; +{ + register int regi; + register greg_t *regp = &(*gregsetp)[0]; + static char zerobuf[MAX_REGISTER_RAW_SIZE] = {0}; + + for (regi = 0; regi <= CXT_RA; regi++) + supply_register (regi, (char *)(regp + regi)); + + supply_register (PC_REGNUM, (char *)(regp + CXT_EPC)); + supply_register (HI_REGNUM, (char *)(regp + CXT_MDHI)); + supply_register (LO_REGNUM, (char *)(regp + CXT_MDLO)); + supply_register (CAUSE_REGNUM, (char *)(regp + CXT_CAUSE)); + + /* Fill inaccessible registers with zero. */ + supply_register (PS_REGNUM, zerobuf); + supply_register (BADVADDR_REGNUM, zerobuf); + supply_register (FP_REGNUM, zerobuf); + supply_register (UNUSED_REGNUM, zerobuf); + for (regi = FIRST_EMBED_REGNUM; regi <= LAST_EMBED_REGNUM; regi++) + supply_register (regi, zerobuf); +} + +void +fill_gregset (gregsetp, regno) + gregset_t *gregsetp; + int regno; +{ + int regi; + register greg_t *regp = &(*gregsetp)[0]; + + for (regi = 0; regi <= 32; regi++) + if ((regno == -1) || (regno == regi)) + *(regp + regi) = *(greg_t *) ®isters[REGISTER_BYTE (regi)]; + + if ((regno == -1) || (regno == PC_REGNUM)) + *(regp + CXT_EPC) = *(greg_t *) ®isters[REGISTER_BYTE (PC_REGNUM)]; + + if ((regno == -1) || (regno == CAUSE_REGNUM)) + *(regp + CXT_CAUSE) = *(greg_t *) ®isters[REGISTER_BYTE (CAUSE_REGNUM)]; + + if ((regno == -1) || (regno == HI_REGNUM)) + *(regp + CXT_MDHI) = *(greg_t *) ®isters[REGISTER_BYTE (HI_REGNUM)]; + + if ((regno == -1) || (regno == LO_REGNUM)) + *(regp + CXT_MDLO) = *(greg_t *) ®isters[REGISTER_BYTE (LO_REGNUM)]; +} + +/* + * Now we do the same thing for floating-point registers. + * We don't bother to condition on FP0_REGNUM since any + * reasonable MIPS configuration has an R3010 in it. + * + * Again, see the comments in m68k-tdep.c. + */ + +void +supply_fpregset (fpregsetp) + fpregset_t *fpregsetp; +{ + register int regi; + static char zerobuf[MAX_REGISTER_RAW_SIZE] = {0}; + + for (regi = 0; regi < 32; regi++) + supply_register (FP0_REGNUM + regi, + (char *)&fpregsetp->fp_r.fp_regs[regi]); + + supply_register (FCRCS_REGNUM, (char *)&fpregsetp->fp_csr); + + /* FIXME: how can we supply FCRIR_REGNUM? The ABI doesn't tell us. */ + supply_register (FCRIR_REGNUM, zerobuf); +} + +void +fill_fpregset (fpregsetp, regno) + fpregset_t *fpregsetp; + int regno; +{ + int regi; + char *from, *to; + + for (regi = FP0_REGNUM; regi < FP0_REGNUM + 32; regi++) + { + if ((regno == -1) || (regno == regi)) + { + from = (char *) ®isters[REGISTER_BYTE (regi)]; + to = (char *) &(fpregsetp->fp_r.fp_regs[regi - FP0_REGNUM]); + memcpy(to, from, REGISTER_RAW_SIZE (regi)); + } + } + + if ((regno == -1) || (regno == FCRCS_REGNUM)) + fpregsetp->fp_csr = *(unsigned *) ®isters[REGISTER_BYTE(FCRCS_REGNUM)]; +} + + +/* Figure out where the longjmp will land. + We expect the first arg to be a pointer to the jmp_buf structure from which + we extract the pc (_JB_PC) that we will land at. The pc is copied into PC. + This routine returns true on success. */ + +int +get_longjmp_target (pc) + CORE_ADDR *pc; +{ + char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT]; + CORE_ADDR jb_addr; + + jb_addr = read_register (A0_REGNUM); + + if (target_read_memory (jb_addr + _JB_PC * JB_ELEMENT_SIZE, buf, + TARGET_PTR_BIT / TARGET_CHAR_BIT)) + return 0; + + *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT); + + return 1; +} |