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authorAndrew Burgess <aburgess@redhat.com>2022-05-19 13:20:17 +0100
committerAndrew Burgess <aburgess@redhat.com>2022-07-21 15:19:42 +0100
commit08106042d9f5fdff60c129bf33190639f1a98b2a (patch)
tree4921381e92dc6ef37a41a82b82c989f532f435cf /gdb/mips-tdep.c
parent602707187fa54572a0addd5049d135f20a5b592b (diff)
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gdb: move the type cast into gdbarch_tdep
I built GDB for all targets on a x86-64/GNU-Linux system, and then (accidentally) passed GDB a RISC-V binary, and asked GDB to "run" the binary on the native target. I got this error: (gdb) show architecture The target architecture is set to "auto" (currently "i386"). (gdb) file /tmp/hello.rv32.exe Reading symbols from /tmp/hello.rv32.exe... (gdb) show architecture The target architecture is set to "auto" (currently "riscv:rv32"). (gdb) run Starting program: /tmp/hello.rv32.exe ../../src/gdb/i387-tdep.c:596: internal-error: i387_supply_fxsave: Assertion `tdep->st0_regnum >= I386_ST0_REGNUM' failed. What's going on here is this; initially the architecture is i386, this is based on the default architecture, which is set based on the native target. After loading the RISC-V executable the architecture of the current inferior is updated based on the architecture of the executable. When we "run", GDB does a fork & exec, with the inferior being controlled through ptrace. GDB sees an initial stop from the inferior as soon as the inferior comes to life. In response to this stop GDB ends up calling save_stop_reason (linux-nat.c), which ends up trying to read register from the inferior, to do this we end up calling target_ops::fetch_registers, which, for the x86-64 native target, calls amd64_linux_nat_target::fetch_registers. After this I eventually end up in i387_supply_fxsave, different x86 based targets will end in different functions to fetch registers, but it doesn't really matter which function we end up in, the problem is this line, which is repeated in many places: i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch); The problem here is that the ARCH in this line comes from the current inferior, which, as we discussed above, will be a RISC-V gdbarch, the tdep field will actually be of type riscv_gdbarch_tdep, not i386_gdbarch_tdep. After this cast we are relying on undefined behaviour, in my case I happen to trigger an assert, but this might not always be the case. The thing I tried that exposed this problem was of course, trying to start an executable of the wrong architecture on a native target. I don't think that the correct solution for this problem is to detect, at the point of cast, that the gdbarch_tdep object is of the wrong type, but, I did wonder, is there a way that we could protect ourselves from incorrectly casting the gdbarch_tdep object? I think that there is something we can do here, and this commit is the first step in that direction, though no actual check is added by this commit. This commit can be split into two parts: (1) In gdbarch.h and arch-utils.c. In these files I have modified gdbarch_tdep (the function) so that it now takes a template argument, like this: template<typename TDepType> static inline TDepType * gdbarch_tdep (struct gdbarch *gdbarch) { struct gdbarch_tdep *tdep = gdbarch_tdep_1 (gdbarch); return static_cast<TDepType *> (tdep); } After this change we are no better protected, but the cast is now done within the gdbarch_tdep function rather than at the call sites, this leads to the second, much larger change in this commit, (2) Everywhere gdbarch_tdep is called, we make changes like this: - i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch); + i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (arch); There should be no functional change after this commit. In the next commit I will build on this change to add an assertion in gdbarch_tdep that checks we are casting to the correct type.
Diffstat (limited to 'gdb/mips-tdep.c')
-rw-r--r--gdb/mips-tdep.c50
1 files changed, 25 insertions, 25 deletions
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 071319c..9827026 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -227,7 +227,7 @@ static const char mips_disassembler_options_n64[] = "gpr-names=64";
const struct mips_regnum *
mips_regnum (struct gdbarch *gdbarch)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
return tdep->regnum;
}
@@ -252,7 +252,7 @@ mips_float_register_p (struct gdbarch *gdbarch, int regnum)
static bool
mips_eabi (gdbarch *arch)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (arch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (arch);
return (tdep->mips_abi == MIPS_ABI_EABI32 \
|| tdep->mips_abi == MIPS_ABI_EABI64);
}
@@ -260,21 +260,21 @@ mips_eabi (gdbarch *arch)
static int
mips_last_fp_arg_regnum (gdbarch *arch)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (arch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (arch);
return tdep->mips_last_fp_arg_regnum;
}
static int
mips_last_arg_regnum (gdbarch *arch)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (arch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (arch);
return tdep->mips_last_arg_regnum;
}
static enum mips_fpu_type
mips_get_fpu_type (gdbarch *arch)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (arch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (arch);
return tdep->mips_fpu_type;
}
@@ -282,14 +282,14 @@ mips_get_fpu_type (gdbarch *arch)
enum mips_abi
mips_abi (struct gdbarch *gdbarch)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
return tdep->mips_abi;
}
int
mips_isa_regsize (struct gdbarch *gdbarch)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
/* If we know how big the registers are, use that size. */
if (tdep->register_size_valid_p)
@@ -335,7 +335,7 @@ mips_abi_regsize (struct gdbarch *gdbarch)
static int
is_mips16_isa (struct gdbarch *gdbarch)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
return tdep->mips_isa == ISA_MIPS16;
}
@@ -344,7 +344,7 @@ is_mips16_isa (struct gdbarch *gdbarch)
static int
is_micromips_isa (struct gdbarch *gdbarch)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
return tdep->mips_isa == ISA_MICROMIPS;
}
@@ -636,7 +636,7 @@ static const char * const mips_linux_reg_names[NUM_MIPS_PROCESSOR_REGS] = {
static const char *
mips_register_name (struct gdbarch *gdbarch, int regno)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
/* GPR names for all ABIs other than n32/n64. */
static const char *mips_gpr_names[] = {
"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
@@ -777,7 +777,7 @@ mips_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
else if (register_size (gdbarch, rawnum) >
register_size (gdbarch, cookednum))
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
if (tdep->mips64_transfers_32bit_regs_p)
return regcache->raw_read_part (rawnum, 0, 4, buf);
@@ -810,7 +810,7 @@ mips_pseudo_register_write (struct gdbarch *gdbarch,
else if (register_size (gdbarch, rawnum) >
register_size (gdbarch, cookednum))
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
if (tdep->mips64_transfers_32bit_regs_p)
regcache->raw_write_part (rawnum, 0, 4, buf);
@@ -855,7 +855,7 @@ mips_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
if (register_size (gdbarch, rawnum) > register_size (gdbarch, reg))
{
mips_gdbarch_tdep *tdep
- = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
if (!tdep->mips64_transfers_32bit_regs_p
|| gdbarch_byte_order (gdbarch) != BFD_ENDIAN_BIG)
@@ -1059,7 +1059,7 @@ mips_register_type (struct gdbarch *gdbarch, int regnum)
else
{
int rawnum = regnum - gdbarch_num_regs (gdbarch);
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
/* The cooked or ABI registers. These are sized according to
the ABI (with a few complications). */
@@ -1191,7 +1191,7 @@ show_mask_address (struct ui_file *file, int from_tty,
else
{
mips_gdbarch_tdep *tdep
- = (mips_gdbarch_tdep *) gdbarch_tdep (target_gdbarch ());
+ = gdbarch_tdep<mips_gdbarch_tdep> (target_gdbarch ());
if (mips_mask_address_p (tdep))
additional_text = _(" (currently \"on\")");
@@ -1727,7 +1727,7 @@ mips32_next_pc (struct regcache *regcache, CORE_ADDR pc)
case 12: /* SYSCALL */
{
mips_gdbarch_tdep *tdep
- = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
if (tdep->syscall_next_pc != NULL)
pc = tdep->syscall_next_pc (get_current_frame ());
@@ -1938,7 +1938,7 @@ micromips_next_pc (struct regcache *regcache, CORE_ADDR pc)
case 0x22d: /* SYSCALL: 000000 1000101101 111100 */
{
mips_gdbarch_tdep *tdep
- = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
if (tdep->syscall_next_pc != NULL)
pc = tdep->syscall_next_pc (get_current_frame ());
@@ -3901,7 +3901,7 @@ mips_stub_frame_base_sniffer (struct frame_info *this_frame)
static CORE_ADDR
mips_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
if (mips_mask_address_p (tdep) && (((ULONGEST) addr) >> 32 == 0xffffffffUL))
/* This hack is a work-around for existing boards using PMON, the
@@ -4804,7 +4804,7 @@ mips_eabi_return_value (struct gdbarch *gdbarch, struct value *function,
struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
int fp_return_type = 0;
int offset, regnum, xfer;
@@ -5195,7 +5195,7 @@ mips_n32n64_return_value (struct gdbarch *gdbarch, struct value *function,
struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
/* From MIPSpro N32 ABI Handbook, Document Number: 007-2816-004
@@ -5704,7 +5704,7 @@ mips_o32_return_value (struct gdbarch *gdbarch, struct value *function,
{
CORE_ADDR func_addr = function ? find_function_addr (function, NULL) : 0;
int mips16 = mips_pc_is_mips16 (gdbarch, func_addr);
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
enum mips_fval_reg fval_reg;
fval_reg = readbuf ? mips16 ? mips_fval_gpr : mips_fval_fpr : mips_fval_both;
@@ -8101,7 +8101,7 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
else if (arches != NULL)
{
mips_gdbarch_tdep *tdep
- = (mips_gdbarch_tdep *) gdbarch_tdep (arches->gdbarch);
+ = gdbarch_tdep<mips_gdbarch_tdep> (arches->gdbarch);
elf_flags = tdep->elf_flags;
}
else
@@ -8142,7 +8142,7 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
if (found_abi == MIPS_ABI_UNKNOWN && info.abfd == NULL && arches != NULL)
{
mips_gdbarch_tdep *tdep
- = (mips_gdbarch_tdep *) gdbarch_tdep (arches->gdbarch);
+ = gdbarch_tdep<mips_gdbarch_tdep> (arches->gdbarch);
found_abi = tdep->found_abi;
}
@@ -8459,7 +8459,7 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
arches = gdbarch_list_lookup_by_info (arches->next, &info))
{
mips_gdbarch_tdep *tdep
- = (mips_gdbarch_tdep *) gdbarch_tdep (arches->gdbarch);
+ = gdbarch_tdep<mips_gdbarch_tdep> (arches->gdbarch);
/* MIPS needs to be pedantic about which ABI and the compressed
ISA variation the object is using. */
@@ -8917,7 +8917,7 @@ mips_fpu_type_str (enum mips_fpu_type fpu_type)
static void
mips_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
{
- mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
if (tdep != NULL)
{
int ef_mips_arch;