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author | Jeff Law <law@redhat.com> | 1997-09-26 18:53:22 +0000 |
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committer | Jeff Law <law@redhat.com> | 1997-09-26 18:53:22 +0000 |
commit | 91ee277977332d6d0d93f246df0302281e2d54be (patch) | |
tree | 8265624bc936f81943c171422d5ac26b4ad1a011 /gdb/mips-tdep.c | |
parent | afa38b3dffdac40f0123d5a84b52a4d933988e13 (diff) | |
download | gdb-91ee277977332d6d0d93f246df0302281e2d54be.zip gdb-91ee277977332d6d0d93f246df0302281e2d54be.tar.gz gdb-91ee277977332d6d0d93f246df0302281e2d54be.tar.bz2 |
* configure.tgt: Set gdb_target to r5900.
* config/mips/tm-r5900.h, config/mips/r5900.mt: New files
* mips-tdep.c (_initialize_mips_tdep): Allow target files to
override default FPU type.
Brought over from r5900 branch.
Diffstat (limited to 'gdb/mips-tdep.c')
-rw-r--r-- | gdb/mips-tdep.c | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index b624739..6951ca5 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -1399,8 +1399,9 @@ mips_push_arguments(nargs, args, sp, struct_return, struct_addr) /* A non-floating-point argument being passed in a general register. If a struct or union, and if - small enough for a single register, we have to - adjust the alignment. + the remaining length is smaller than the register + size, we have to adjust the register value on + big endian targets. It does not seem to be necessary to do the same for integral types. @@ -1408,7 +1409,8 @@ mips_push_arguments(nargs, args, sp, struct_return, struct_addr) Also don't do this adjustment on EABI targets. */ if (!MIPS_EABI && - TYPE_LENGTH (arg_type) < MIPS_REGSIZE && + TARGET_BYTE_ORDER == BIG_ENDIAN && + partial_len < MIPS_REGSIZE && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) regval <<= ((MIPS_REGSIZE - partial_len) * @@ -2625,8 +2627,18 @@ normal floating point support.", c = add_show_from_set (c, &showlist); c->function.sfunc = mips_show_fpu_command; +#ifndef MIPS_DEFAULT_FPU_TYPE mips_fpu = MIPS_FPU_DOUBLE; mips_fpu_string = strsave ("double"); +#else + mips_fpu = MIPS_DEFAULT_FPU_TYPE; + switch (mips_fpu) + { + case MIPS_FPU_DOUBLE: mips_fpu_string = strsave ("double"); break; + case MIPS_FPU_SINGLE: mips_fpu_string = strsave ("single"); break; + case MIPS_FPU_NONE: mips_fpu_string = strsave ("none"); break; + } +#endif c = add_set_cmd ("processor", class_support, var_string_noescape, (char *) &tmp_mips_processor_type, |