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author | Daniel Jacobowitz <drow@false.org> | 2001-07-05 23:30:43 +0000 |
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committer | Daniel Jacobowitz <drow@false.org> | 2001-07-05 23:30:43 +0000 |
commit | 9022177cbdaf59a083c1fb3a6d5152fe308fd199 (patch) | |
tree | c73ae4aaf1dd22800b47816660b6faf028c89a5f /gdb/mips-tdep.c | |
parent | 2ac44c70305d4e09092a8276226e820cd31e489a (diff) | |
download | gdb-9022177cbdaf59a083c1fb3a6d5152fe308fd199.zip gdb-9022177cbdaf59a083c1fb3a6d5152fe308fd199.tar.gz gdb-9022177cbdaf59a083c1fb3a6d5152fe308fd199.tar.bz2 |
* mips-tdep.c (mips_software_single_step): New function.
* config/mips/tm-mips.h: Add prototype for
mips_software_single_step.
Diffstat (limited to 'gdb/mips-tdep.c')
-rw-r--r-- | gdb/mips-tdep.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index c56d97e..d83c4d1 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -1379,6 +1379,33 @@ mips_addr_bits_remove (CORE_ADDR addr) return addr; } +/* mips_software_single_step() is called just before we want to resume + the inferior, if we want to single-step it but there is no hardware + or kernel single-step support (MIPS on Linux for example). We find + the target of the coming instruction and breakpoint it. + + single_step is also called just after the inferior stops. If we had + set up a simulated single-step, we undo our damage. */ + +void +mips_software_single_step (enum target_signal sig, int insert_breakpoints_p) +{ + static CORE_ADDR next_pc; + typedef char binsn_quantum[BREAKPOINT_MAX]; + static binsn_quantum break_mem; + CORE_ADDR pc; + + if (insert_breakpoints_p) + { + pc = read_register (PC_REGNUM); + next_pc = mips_next_pc (pc); + + target_insert_breakpoint (next_pc, break_mem); + } + else + target_remove_breakpoint (next_pc, break_mem); +} + static void mips_init_frame_pc_first (int fromleaf, struct frame_info *prev) { |