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authorAlexandre Oliva <aoliva@redhat.com>2003-04-12 00:31:30 +0000
committerAlexandre Oliva <aoliva@redhat.com>2003-04-12 00:31:30 +0000
commit2252e863673a8c1b0c7a3753cf600a96a574e619 (patch)
tree0e96171a0cce34401e1215bad6f0b6097082ccb6 /gdb/mips-tdep.c
parent2a8e99b308e528f8139cfa767fe518d53c6c6e30 (diff)
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* Makefile.in (libbfd_h): Added missing setting.
* mips-tdep.c (mips_gdbarch_init): Set disassembler_options according to the selected ABI.
Diffstat (limited to 'gdb/mips-tdep.c')
-rw-r--r--gdb/mips-tdep.c52
1 files changed, 28 insertions, 24 deletions
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index d2204aa..4652e03 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -5731,6 +5731,34 @@ mips_gdbarch_init (struct gdbarch_info info,
if (wanted_abi != MIPS_ABI_UNKNOWN)
mips_abi = wanted_abi;
+ /* We have to set tm_print_insn_info before looking for a
+ pre-existing architecture, otherwise we may return before we get
+ a chance to set it up. */
+ if (mips_abi == MIPS_ABI_N32 || mips_abi == MIPS_ABI_N64)
+ {
+ /* Set up the disassembler info, so that we get the right
+ register names from libopcodes. */
+ if (mips_abi == MIPS_ABI_N32)
+ tm_print_insn_info.disassembler_options = "gpr-names=n32";
+ else
+ tm_print_insn_info.disassembler_options = "gpr-names=64";
+ tm_print_insn_info.flavour = bfd_target_elf_flavour;
+ tm_print_insn_info.arch = bfd_arch_mips;
+ if (info.bfd_arch_info != NULL
+ && info.bfd_arch_info->arch == bfd_arch_mips
+ && info.bfd_arch_info->mach)
+ tm_print_insn_info.mach = info.bfd_arch_info->mach;
+ else
+ tm_print_insn_info.mach = bfd_mach_mips8000;
+ }
+ else
+ /* This string is not recognized explicitly by the disassembler,
+ but it tells the disassembler to not try to guess the ABI from
+ the bfd elf headers, such that, if the user overrides the ABI
+ of a program linked as NewABI, the disassembly will follow the
+ register naming conventions specified by the user. */
+ tm_print_insn_info.disassembler_options = "gpr-names=32";
+
if (gdbarch_debug)
{
fprintf_unfiltered (gdb_stdlog,
@@ -5875,18 +5903,6 @@ mips_gdbarch_init (struct gdbarch_info info,
set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32);
set_gdbarch_long_long_bit (gdbarch, 64);
-
- /* Set up the disassembler info, so that we get the right
- register names from libopcodes. */
- tm_print_insn_info.flavour = bfd_target_elf_flavour;
- tm_print_insn_info.arch = bfd_arch_mips;
- if (info.bfd_arch_info != NULL
- && info.bfd_arch_info->arch == bfd_arch_mips
- && info.bfd_arch_info->mach)
- tm_print_insn_info.mach = info.bfd_arch_info->mach;
- else
- tm_print_insn_info.mach = bfd_mach_mips8000;
-
set_gdbarch_use_struct_convention (gdbarch,
mips_n32n64_use_struct_convention);
set_gdbarch_reg_struct_has_addr (gdbarch,
@@ -5906,18 +5922,6 @@ mips_gdbarch_init (struct gdbarch_info info,
set_gdbarch_long_bit (gdbarch, 64);
set_gdbarch_ptr_bit (gdbarch, 64);
set_gdbarch_long_long_bit (gdbarch, 64);
-
- /* Set up the disassembler info, so that we get the right
- register names from libopcodes. */
- tm_print_insn_info.flavour = bfd_target_elf_flavour;
- tm_print_insn_info.arch = bfd_arch_mips;
- if (info.bfd_arch_info != NULL
- && info.bfd_arch_info->arch == bfd_arch_mips
- && info.bfd_arch_info->mach)
- tm_print_insn_info.mach = info.bfd_arch_info->mach;
- else
- tm_print_insn_info.mach = bfd_mach_mips8000;
-
set_gdbarch_use_struct_convention (gdbarch,
mips_n32n64_use_struct_convention);
set_gdbarch_reg_struct_has_addr (gdbarch,