GDB PR tdep/8282: MIPS: Wire in `set disassembler-options'

Implement MIPS target support for passing options to the disassembler,
complementing commit 65b48a81404c ("GDB: Add support for the new
set/show disassembler-options commands.").

This includes options that expect an argument, so adjust the generic
code and data structures used so as to handle such options.  So as to
give backends syntax flexibility no specific delimiter has been defined
to separate options from their respective arguments, so it has to be
included as the last character of the option name.  Completion code
however has not been adjusted and consequently option arguments cannot
be completed at this time.

Also the MIPS target has non-empty defaults for the options, so that ABI
names for the general-purpose registers respect our `set mips abi ...'
setting rather than always being determined from the ELF headers of the
binary file selected.  Handle these defaults as implicit options, never
shown to the user and always prepended to the user-specified options, so
that the latters can override the defaults.

The resulting output for the MIPS target is as follows:

(gdb) show disassembler-options
The current disassembler options are ''

The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:

  no-aliases      Use canonical instruction forms.

  msa             Recognize MSA instructions.

  virt            Recognize the virtualization ASE instructions.

  xpa             Recognize the eXtended Physical Address (XPA) ASE
                  instructions.

  ginv            Recognize the Global INValidate (GINV) ASE instructions.

  gpr-names=ABI   Print GPR names according to specified ABI.
                  Default: based on binary being disassembled.

  fpr-names=ABI   Print FPR names according to specified ABI.
                  Default: numeric.

  cp0-names=ARCH  Print CP0 register names according to specified architecture.
                  Default: based on binary being disassembled.

  hwr-names=ARCH  Print HWR names according to specified architecture.
                  Default: based on binary being disassembled.

  reg-names=ABI   Print GPR and FPR names according to specified ABI.

  reg-names=ARCH  Print CP0 register and HWR names according to specified
                  architecture.

  For the options above, the following values are supported for "ABI":
    numeric 32 n32 64

  For the options above, the following values are supported for "ARCH":
    numeric r3000 r3900 r4000 r4010 vr4100 vr4111 vr4120 r4300 r4400 r4600
    r4650 r5000 vr5400 vr5500 r5900 r6000 rm7000 rm9000 r8000 r10000 r12000
    r14000 r16000 mips5 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips64
    mips64r2 mips64r3 mips64r5 mips64r6 interaptiv-mr2 sb1 loongson2e
    loongson2f loongson3a octeon octeon+ octeon2 octeon3 xlr xlp
(gdb)

which corresponds to what `objdump --help' used to print for the MIPS
target, with minor formatting changes, most notably option argument
lists being wrapped, but also the amount of white space separating
options from the respective descriptions.  The relevant part the new
code is now also used by `objdump --help', which means these formatting
changes apply to both outputs, except for argument list wrapping, which
is GDB-specific.

This also adds a separating new line between the heading and option
lists where descriptions are provided, hence:

(gdb) set architecture s390:31-bit
(gdb) show disassembler-options
The current disassembler options are ''

The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:

  esa         Disassemble in ESA architecture mode
  zarch       Disassemble in z/Architecture mode
  insnlength  Print unknown instructions according to length from first two bits
(gdb)

but:

(gdb) set architecture powerpc:common
(gdb) show disassembler-options
The current disassembler options are ''

The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:
  403, 405, 440, 464, 476, 601, 603, 604, 620, 7400, 7410, 7450, 7455, 750cl,
  821, 850, 860, a2, altivec, any, booke, booke32, cell, com, e200z4, e300,
  e500, e500mc, e500mc64, e5500, e6500, e500x2, efs, efs2, power4, power5,
  power6, power7, power8, power9, ppc, ppc32, 32, ppc64, 64, ppc64bridge,
  ppcps, pwr, pwr2, pwr4, pwr5, pwr5x, pwr6, pwr7, pwr8, pwr9, pwrx, raw, spe,
  spe2, titan, vle, vsx
(gdb)

Existing affected target backends have been adjusted accordingly.

This has been verified manually with:

(gdb) set architecture arm
(gdb) set architecture powerpc:common
(gdb) set architecture s390:31-bit

to cause no issues with the `show disassembler-options' and `set
disassembler-options' commands.  A test case for the MIPS target has
also been provided, covering the default settings with ABI overrides as
well as disassembler option overrides.

2018-07-02  Maciej W. Rozycki  <macro@mips.com>
            Simon Marchi  <simon.marchi@polymtl.ca>

	include/
	PR tdep/8282
	* dis-asm.h (disasm_option_arg_t): New typedef.
	(disasm_options_and_args_t): Likewise.
	(disasm_options_t): Add `arg' member, document members.
	(disassembler_options_mips): New prototype.
	(disassembler_options_arm, disassembler_options_powerpc)
	(disassembler_options_s390): Update prototypes.

	opcodes/
	PR tdep/8282
	* mips-dis.c (mips_option_arg_t): New enumeration.
	(mips_options): New variable.
	(disassembler_options_mips): New function.
	(print_mips_disassembler_options): Reimplement in terms of
	`disassembler_options_mips'.
	* arm-dis.c (disassembler_options_arm): Adapt to using the
	`disasm_options_and_args_t' structure.
	* ppc-dis.c (disassembler_options_powerpc): Likewise.
	* s390-dis.c (disassembler_options_s390): Likewise.

	gdb/
	PR tdep/8282
	* disasm.h (gdb_disassembler): Add
	`m_disassembler_options_holder'. member
	* disasm.c (get_all_disassembler_options): New function.
	(gdb_disassembler::gdb_disassembler): Use it.
	(gdb_buffered_insn_length_init_dis): Likewise.
	(gdb_buffered_insn_length): Adjust accordingly.
	(set_disassembler_options): Handle options with arguments.
	(show_disassembler_options_sfunc): Likewise.  Add a leading new
	line if showing options with descriptions.
	(disassembler_options_completer): Adapt to using the
	`disasm_options_and_args_t' structure.
	* mips-tdep.c (mips_disassembler_options): New variable.
	(mips_disassembler_options_o32): Likewise.
	(mips_disassembler_options_n32): Likewise.
	(mips_disassembler_options_n64): Likewise.
	(gdb_print_insn_mips): Don't set `disassembler_options'.
	(gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): Remove
	functions.
	(mips_gdbarch_init): Always set `gdbarch_print_insn' to
	`gdb_print_insn_mips'.  Set `gdbarch_disassembler_options',
	`gdbarch_disassembler_options_implicit' and
	`gdbarch_valid_disassembler_options'.
	* arm-tdep.c (_initialize_arm_tdep): Adapt to using the
	`disasm_options_and_args_t' structure.
	* gdbarch.sh (disassembler_options_implicit): New `gdbarch'
	method.
	(valid_disassembler_options): Switch from `disasm_options_t' to
	the `disasm_options_and_args_t' structure.
	* NEWS: Document `set disassembler-options' support for the MIPS
	target.
	* gdbarch.h: Regenerate.
	* gdbarch.c: Regenerate.

	gdb/doc/
	PR tdep/8282
	* gdb.texinfo (Source and Machine Code): Document `set
	disassembler-options' support for the MIPS target.

	gdb/testsuite/
	PR tdep/8282
	* gdb.arch/mips-disassembler-options.exp: New test.
	* gdb.arch/mips-disassembler-options.s: New test source.

1 files changed, 24 insertions, 36 deletions

diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 32b2d40..36fae02 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -214,6 +214,18 @@ static unsigned int mips_debug = 0;
 struct target_desc *mips_tdesc_gp32;
 struct target_desc *mips_tdesc_gp64;
 
+/* The current set of options to be passed to the disassembler.  */
+static char *mips_disassembler_options;
+
+/* Implicit disassembler options for individual ABIs.  These tell
+   libopcodes to use general-purpose register names corresponding
+   to the ABI we have selected, perhaps via a `set mips abi ...'
+   override, rather than ones inferred from the ABI set in the ELF
+   headers of the binary file selected for debugging.  */
+static const char mips_disassembler_options_o32[] = "gpr-names=32";
+static const char mips_disassembler_options_n32[] = "gpr-names=n32";
+static const char mips_disassembler_options_n64[] = "gpr-names=64";
+
 const struct mips_regnum *
 mips_regnum (struct gdbarch *gdbarch)
 {
@@ -6990,40 +7002,9 @@ gdb_print_insn_mips (bfd_vma memaddr, struct disassemble_info *info)
   memaddr &= (info->mach == bfd_mach_mips16
 	      || info->mach == bfd_mach_mips_micromips) ? ~1 : ~3;
 
-  /* Set the disassembler options.  */
-  if (!info->disassembler_options)
-    /* This string is not recognized explicitly by the disassembler,
-       but it tells the disassembler to not try to guess the ABI from
-       the bfd elf headers, such that, if the user overrides the ABI
-       of a program linked as NewABI, the disassembly will follow the
-       register naming conventions specified by the user.  */
-    info->disassembler_options = "gpr-names=32";
-
   return default_print_insn (memaddr, info);
 }
 
-static int
-gdb_print_insn_mips_n32 (bfd_vma memaddr, struct disassemble_info *info)
-{
-  /* Set up the disassembler info, so that we get the right
-     register names from libopcodes.  */
-  info->disassembler_options = "gpr-names=n32";
-  info->flavour = bfd_target_elf_flavour;
-
-  return gdb_print_insn_mips (memaddr, info);
-}
-
-static int
-gdb_print_insn_mips_n64 (bfd_vma memaddr, struct disassemble_info *info)
-{
-  /* Set up the disassembler info, so that we get the right
-     register names from libopcodes.  */
-  info->disassembler_options = "gpr-names=64";
-  info->flavour = bfd_target_elf_flavour;
-
-  return gdb_print_insn_mips (memaddr, info);
-}
-
 /* Implement the breakpoint_kind_from_pc gdbarch method.  */
 
 static int
@@ -8727,12 +8708,19 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
   set_gdbarch_print_registers_info (gdbarch, mips_print_registers_info);
 
-  if (mips_abi == MIPS_ABI_N32)
-    set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips_n32);
-  else if (mips_abi == MIPS_ABI_N64)
-    set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips_n64);
+  set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips);
+  if (mips_abi == MIPS_ABI_N64)
+    set_gdbarch_disassembler_options_implicit
+      (gdbarch, (const char *) mips_disassembler_options_n64);
+  else if (mips_abi == MIPS_ABI_N32)
+    set_gdbarch_disassembler_options_implicit
+      (gdbarch, (const char *) mips_disassembler_options_n32);
   else
-    set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips);
+    set_gdbarch_disassembler_options_implicit
+      (gdbarch, (const char *) mips_disassembler_options_o32);
+  set_gdbarch_disassembler_options (gdbarch, &mips_disassembler_options);
+  set_gdbarch_valid_disassembler_options (gdbarch,
+					  disassembler_options_mips ());
 
   /* FIXME: cagney/2003-08-29: The macros target_have_steppable_watchpoint,
      HAVE_NONSTEPPABLE_WATCHPOINT, and target_have_continuable_watchpoint