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authorDaniel Jacobowitz <drow@false.org>2006-03-15 16:37:52 +0000
committerDaniel Jacobowitz <drow@false.org>2006-03-15 16:37:52 +0000
commitd05f682671b41368ad31d683d32571dd672fefda (patch)
tree8430508a49b81e59dfd54c2109113693e37e8b1d /gdb/mips-linux-tdep.c
parent3e5af19ed9851916142fe98cc9c5d79c2c4f8302 (diff)
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* mips-linux-tdep.c: Include "floatformat.h".
(mips_linux_init_abi): Use 128-bit long double for N32 and N64. (mips_n32n64_return_value): Support 128-bit long double. (print_gp_register_row): Don't print spaces before ignored or floating point registers.
Diffstat (limited to 'gdb/mips-linux-tdep.c')
-rw-r--r--gdb/mips-linux-tdep.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/gdb/mips-linux-tdep.c b/gdb/mips-linux-tdep.c
index 021edc7..f2a941c 100644
--- a/gdb/mips-linux-tdep.c
+++ b/gdb/mips-linux-tdep.c
@@ -32,6 +32,7 @@
#include "regcache.h"
#include "trad-frame.h"
#include "tramp-frame.h"
+#include "floatformat.h"
/* Copied from <asm/elf.h>. */
#define ELF_NGREG 45
@@ -1110,6 +1111,15 @@ mips_linux_init_abi (struct gdbarch_info info,
set_solib_svr4_fetch_link_map_offsets
(gdbarch, svr4_ilp32_fetch_link_map_offsets);
set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr);
+ set_gdbarch_long_double_bit (gdbarch, 128);
+ /* These floatformats should probably be renamed. MIPS uses
+ the same 128-bit IEEE floating point format that IA-64 uses,
+ except that the quiet/signalling NaN bit is reversed (GDB
+ does not distinguish between quiet and signalling NaNs). */
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+ set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big);
+ else
+ set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_little);
tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
break;
case MIPS_ABI_N64:
@@ -1118,6 +1128,15 @@ mips_linux_init_abi (struct gdbarch_info info,
set_solib_svr4_fetch_link_map_offsets
(gdbarch, svr4_lp64_fetch_link_map_offsets);
set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr);
+ set_gdbarch_long_double_bit (gdbarch, 128);
+ /* These floatformats should probably be renamed. MIPS uses
+ the same 128-bit IEEE floating point format that IA-64 uses,
+ except that the quiet/signalling NaN bit is reversed (GDB
+ does not distinguish between quiet and signalling NaNs). */
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+ set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big);
+ else
+ set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_little);
tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
break;
default: