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authorMichael Snyder <msnyder@vmware.com>2011-01-09 03:20:33 +0000
committerMichael Snyder <msnyder@vmware.com>2011-01-09 03:20:33 +0000
commit025bb325db8dce957db69eaf148c5bec373d4bb6 (patch)
tree0aec8dba9ee9dc28ad87284c4dfdfb0b01cdde50 /gdb/microblaze-tdep.c
parent1777feb0fea5ec350a86eecf81f71ccc60d4cf6f (diff)
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2011-01-08 Michael Snyder <msnyder@vmware.com>
* m2-exp.y: Comment cleanup, mostly periods and spaces. * m2-lang.c: Ditto. * m2-typeprint.c: Ditto. * m2-valprint.c: Ditto. * m32c-tdep.c: Ditto. * m32r-linux-nat.c: Ditto. * m32r-rom.c: Ditto. * m32r-tdep.c: Ditto. * m32r-tdep.h: Ditto. * m68hc11-tdep.c: Ditto. * m58klinux-nat.c: Ditto. * m68k-tdep.c: Ditto. * m88k-tdep.c: Ditto. * m88k-tdep.h: Ditto. * machoread.c: Ditto. * macrocmd.c: Ditto. * macroexp.c: Ditto. * macrotab.c: Ditto. * main.c: Ditto. * maint.c: Ditto. * mdebugread.c: Ditto. * mdebugread.h: Ditto. * memattr.c: Ditto. * memattr.h: Ditto. * memory-map.h: Ditto. * mep-tdep.c: Ditto. * microblaze-rom.c: Ditto. * microblaze-tdep.c: Ditto. * minsyms.c: Ditto. * mips-irix-tdep.c: Ditto. * mips-linux-nat.c: Ditto. * mips-linux-tdep.c: Ditto. * mips-linux-tdep.h: Ditto. * mipsnbsd-nat.c: Ditto. * mipsnbsd-tdep.c: Ditto. * mipsread.c: Ditto. * mips-tdep.c: Ditto. * mips-tdep.h: Ditto. * mn10300-linux-tdep.c: Ditto. * mn10300-tdep.c: Ditto. * mn10300-tdep.h: Ditto. * monitor.c: Ditto. * monitor.h: Ditto. * moxie-tdep.c: Ditto. * moxie-tdep.h: Ditto. * mt-tdep.c: Ditto.
Diffstat (limited to 'gdb/microblaze-tdep.c')
-rw-r--r--gdb/microblaze-tdep.c37
1 files changed, 19 insertions, 18 deletions
diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
index 60b0562..1e994a2 100644
--- a/gdb/microblaze-tdep.c
+++ b/gdb/microblaze-tdep.c
@@ -49,19 +49,19 @@
This set also needs to be verified if it is complete. */
#define IS_RETURN(op) (op == rtsd || op == rtid)
#define IS_UPDATE_SP(op, rd, ra) \
- ((op == addik || op == addi) && rd == REG_SP && ra == REG_SP)
+ ((op == addik || op == addi) && rd == REG_SP && ra == REG_SP)
#define IS_SPILL_SP(op, rd, ra) \
- ((op == swi || op == sw) && rd == REG_SP && ra == REG_SP)
+ ((op == swi || op == sw) && rd == REG_SP && ra == REG_SP)
#define IS_SPILL_REG(op, rd, ra) \
- ((op == swi || op == sw) && rd != REG_SP && ra == REG_SP)
+ ((op == swi || op == sw) && rd != REG_SP && ra == REG_SP)
#define IS_ALSO_SPILL_REG(op, rd, ra, rb) \
- ((op == swi || op == sw) && rd != REG_SP && ra == 0 && rb == REG_SP)
+ ((op == swi || op == sw) && rd != REG_SP && ra == 0 && rb == REG_SP)
#define IS_SETUP_FP(op, ra, rb) \
- ((op == add || op == addik || op == addk) && ra == REG_SP && rb == 0)
+ ((op == add || op == addik || op == addk) && ra == REG_SP && rb == 0)
#define IS_SPILL_REG_FP(op, rd, ra, fpregnum) \
- ((op == swi || op == sw) && rd != REG_SP && ra == fpregnum && ra != 0)
+ ((op == swi || op == sw) && rd != REG_SP && ra == fpregnum && ra != 0)
#define IS_SAVE_HIDDEN_PTR(op, rd, ra, rb) \
- ((op == add || op == addik) && ra == MICROBLAZE_FIRST_ARGREG && rb == 0)
+ ((op == add || op == addik) && ra == MICROBLAZE_FIRST_ARGREG && rb == 0)
/* The registers of the Xilinx microblaze processor. */
@@ -221,7 +221,7 @@ microblaze_alloc_frame_cache (void)
/* Analyze the prologue to determine where registers are saved,
the end of the prologue, etc. Return the address of the first line
- of "real" code (i.e., the end of the prologue). */
+ of "real" code (i.e., the end of the prologue). */
static CORE_ADDR
microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
@@ -237,7 +237,7 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
int save_hidden_pointer_found = 0;
int non_stack_instruction_found = 0;
- /* Find the start of this function. */
+ /* Find the start of this function. */
find_pc_partial_function (pc, &name, &func_addr, &func_end);
if (func_addr < pc)
pc = func_addr;
@@ -257,7 +257,7 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
If we're about to return, our frame has already been deallocated.
If we are stopped at the first instruction of a prologue,
- then our frame has not yet been set up. */
+ then our frame has not yet been set up. */
/* Get the first insn from memory. */
@@ -331,7 +331,7 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
else if (IS_SETUP_FP(op, ra, rb))
{
/* We have a frame pointer. Note the register which is
- acting as the frame pointer. */
+ acting as the frame pointer. */
flags |= MICROBLAZE_MY_FRAME_IN_FP;
flags &= ~MICROBLAZE_MY_FRAME_IN_SP;
cache->fp_regnum = rd;
@@ -376,7 +376,7 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
/* When optimizations are enabled, it is not guaranteed that prologue
instructions are not mixed in with other instructions from the
- program. Some programs show this behavior at -O2. This can be
+ program. Some programs show this behavior at -O2. This can be
avoided by adding -fno-schedule-insns2 switch as of now (edk 8.1)
In such cases, we scan the function until we see the first control
instruction. */
@@ -391,7 +391,7 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
continue; /* continue if imm. */
}
- /* This is not a prologue insn, so stop here. */
+ /* This is not a prologue insn, so stop here. */
microblaze_debug ("insn is not a prologue insn -- ending scan\n");
break;
}
@@ -509,7 +509,8 @@ microblaze_frame_prev_register (struct frame_info *this_frame,
regnum = 15;
if (regnum == MICROBLAZE_SP_REGNUM)
regnum = 1;
- return trad_frame_get_prev_register (this_frame, cache->saved_regs, regnum);
+ return trad_frame_get_prev_register (this_frame,
+ cache->saved_regs, regnum);
}
else
return trad_frame_get_prev_register (this_frame, cache->saved_regs,
@@ -527,7 +528,8 @@ static const struct frame_unwind microblaze_frame_unwind =
};
static CORE_ADDR
-microblaze_frame_base_address (struct frame_info *next_frame, void **this_cache)
+microblaze_frame_base_address (struct frame_info *next_frame,
+ void **this_cache)
{
struct microblaze_frame_cache *cache =
microblaze_frame_cache (next_frame, this_cache);
@@ -581,8 +583,7 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
Longs are stored in r3 (most significant word) and r4 (least
significant word).
- Small structures are always returned on stack.
-*/
+ Small structures are always returned on stack. */
static void
microblaze_store_return_value (struct type *type, struct regcache *regcache,
@@ -720,7 +721,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
- /* Unwind the frame. */
+ /* Unwind the frame. */
dwarf2_append_unwinders (gdbarch);
frame_unwind_append_unwinder (gdbarch, &microblaze_frame_unwind);
frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);