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authorMarkus Deuling <deuling@de.ibm.com>2008-02-20 14:31:40 +0000
committerMarkus Deuling <deuling@de.ibm.com>2008-02-20 14:31:40 +0000
commitae4b228419367dd170acf7251a82413d890ad61a (patch)
tree72eea7e0448d7d00a8d11121d797e7177115e648 /gdb/m32r-tdep.c
parent7f6ef0c0b8517b25e34e9f5c1208afefef50aec9 (diff)
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* gdbarch.sh (memory_insert_breakpoint, memory_remove_breakpoint): Add
gdbarch as parameter. * gdbarch.{c,h}: Regenerate. * ppc-tdep.h (ppc_linux_memory_remove_breakpoint): Add gdbarch as parameter. * mem-break.c (default_memory_insert_breakpoint) (default_memory_remove_breakpoint): Likewise. * target.h (default_memory_remove_breakpoint) (default_memory_insert_breakpoint): Likewise. * ppc-linux-tdep.c (ppc_linux_memory_remove_breakpoint): Add gdbarch as parameter. Replace current_gdbarch by gdbarch. * m32r-tdep.c (m32r_memory_insert_breakpoint) (m32r_memory_remove_breakpoint): Likewise.
Diffstat (limited to 'gdb/m32r-tdep.c')
-rw-r--r--gdb/m32r-tdep.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/gdb/m32r-tdep.c b/gdb/m32r-tdep.c
index 714a98c..8085b86 100644
--- a/gdb/m32r-tdep.c
+++ b/gdb/m32r-tdep.c
@@ -79,7 +79,8 @@ m32r_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
The following functions take care of this behavior. */
static int
-m32r_memory_insert_breakpoint (struct bp_target_info *bp_tgt)
+m32r_memory_insert_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
{
CORE_ADDR addr = bp_tgt->placed_address;
int val;
@@ -95,7 +96,7 @@ m32r_memory_insert_breakpoint (struct bp_target_info *bp_tgt)
bp_tgt->placed_size = bp_tgt->shadow_len = 4;
/* Determine appropriate breakpoint contents and size for this address. */
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
{
if ((addr & 3) == 0)
{
@@ -136,7 +137,8 @@ m32r_memory_insert_breakpoint (struct bp_target_info *bp_tgt)
}
static int
-m32r_memory_remove_breakpoint (struct bp_target_info *bp_tgt)
+m32r_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
{
CORE_ADDR addr = bp_tgt->placed_address;
int val;
@@ -149,7 +151,7 @@ m32r_memory_remove_breakpoint (struct bp_target_info *bp_tgt)
buf[3] = contents_cache[3];
/* Remove parallel bit. */
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
{
if ((buf[0] & 0x80) == 0 && (buf[2] & 0x80) != 0)
buf[2] &= 0x7f;