diff options
author | Markus Deuling <deuling@de.ibm.com> | 2008-03-11 05:21:38 +0000 |
---|---|---|
committer | Markus Deuling <deuling@de.ibm.com> | 2008-03-11 05:21:38 +0000 |
commit | 20a6ec495b38548cc88165e7c18203d6d387d55d (patch) | |
tree | b7cd82da0005270ffc124fc9a86df24e57a96f1c /gdb/i387-tdep.c | |
parent | dd2c76da5595b0a7c60acc52328955e0b847fcaf (diff) | |
download | gdb-20a6ec495b38548cc88165e7c18203d6d387d55d.zip gdb-20a6ec495b38548cc88165e7c18203d6d387d55d.tar.gz gdb-20a6ec495b38548cc88165e7c18203d6d387d55d.tar.bz2 |
* win32-nat.c (do_win32_fetch_inferior_registers): Use get_regcache_arch
to get at the current architecture and at the target specific vector.
Add target specific vector to I387_FISEG_REGNUM and I387_FOP_REGNUM and
remove define of I387_ST0_REGNUM.
* amd64-tdep.c (I387_ST0_REGNUM): Remove define.
(amd64_supply_fxsave, amd64_collect_fxsave): Use get_regcache_arch to
get at the current architecture
(I387_FISEG_REGNUM, I387_FOSEG_REGNUM): Add target specific vector as
parameter.
* i386-tdep.c: Remove various define's and undef's of I387_ST0_REGNUM,
I387_NUM_XMM_REGS and I387_MM0_REGNUM.
(I387_NUM_XMM_REGS, I387_XMM0_REGNUM, I387_MXCSR_REGNUM,
I387_ST0_REGNUM, I387_FCTRL_REGNUM, I387_MM0_REGNUM,
(I387_FSTAT_REGNUM): Add target specific vector as parameter.
(i386_register_name, i386_dbx_reg_to_regnum): Use gdbarch_tdep to get
at the target specific vector.
(i386_get_longjmp_target): Use get_frame_arch to get at the current
architecture. Use gdbarch_tdep to get at the target specific vector.
(i386_fp_regnum_p, i386_fpc_regnum_p): Add gdbarch as parameter and
update caller. Use gdbarch_tdep to get at the target specific vector.
(i386_register_to_value: Use get_frame_arch to get at the current
architecture.
* i386-tdep.h (i386_fp_regnum_p, i386_fpc_regnum_p): Add gdbarch as
parameter.
* i387-tdep.c (I387_FCTRL_REGNUM, I387_FSTAT_REGNUM, I387_FTAG_REGNUM,
I387_FISEG_REGNUM, I387_FIOFF_REGNUM, I387_FOSEG_REGNUM
I387_FOOFF_REGNUM, I387_FOP_REGNUM, I387_ST0_REGNUM, FSAVE_ADDR,
FXSAVE_ADDR, I387_XMM0_REGNUM): Add target specific vector as parameter.
(I387_ST0_REGNUM, I387_NUM_XMM_REGS): Remove various define's and
undef's.
(i387_convert_register_p, i387_register_to_value,
i387_value_to_register): Update call for i386_fp_regnum_p.
* i387-tdep.h: Remove comment.
(I387_ST0_REGNUM, I387_NUM_XMM_REGS, I387_MM0_REGNUM): Add define.
(I387_FCTRL_REGNUM, I387_FSTAT_REGNUM, I387_FTAG_REGNUM,
I387_FISEG_REGNUM, I387_FIOFF_REGNUM, I387_FOSEG_REGNUM,
I387_FOOFF_REGNUM, I387_FOP_REGNUM, I387_XMM0_REGNUM,
I387_MXCSR_REGNUM): Add target specific vector as parameter.
Diffstat (limited to 'gdb/i387-tdep.c')
-rw-r--r-- | gdb/i387-tdep.c | 162 |
1 files changed, 61 insertions, 101 deletions
diff --git a/gdb/i387-tdep.c b/gdb/i387-tdep.c index 6df384c..06ef7ee 100644 --- a/gdb/i387-tdep.c +++ b/gdb/i387-tdep.c @@ -215,18 +215,14 @@ i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file, gdb_assert (gdbarch == get_frame_arch (frame)); - /* Define I387_ST0_REGNUM such that we use the proper definitions - for FRAME's architecture. */ -#define I387_ST0_REGNUM tdep->st0_regnum - - fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM); - fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM); - ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM); - fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM); - fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM); - foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM); - fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM); - fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM); + fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM (tdep)); + fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM (tdep)); + ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM (tdep)); + fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM (tdep)); + fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM (tdep)); + foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM (tdep)); + fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM (tdep)); + fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM (tdep)); top = ((fstat >> 11) & 7); @@ -254,7 +250,8 @@ i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file, break; } - get_frame_register (frame, (fpreg + 8 - top) % 8 + I387_ST0_REGNUM, raw); + get_frame_register (frame, (fpreg + 8 - top) % 8 + I387_ST0_REGNUM (tdep), + raw); fputs_filtered ("0x", file); for (i = 9; i >= 0; i--) @@ -280,8 +277,6 @@ i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file, fprintf_filtered (file, "%s\n", hex_string_custom (fooff, 8)); fprintf_filtered (file, "Opcode: %s\n", hex_string_custom (fop ? (fop | 0xd800) : 0, 4)); - -#undef I387_ST0_REGNUM } @@ -291,7 +286,7 @@ i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file, int i387_convert_register_p (struct gdbarch *gdbarch, int regnum, struct type *type) { - if (i386_fp_regnum_p (regnum)) + if (i386_fp_regnum_p (gdbarch, regnum)) { /* Floating point registers must be converted unless we are accessing them in their hardware type. */ @@ -313,7 +308,7 @@ i387_register_to_value (struct frame_info *frame, int regnum, { gdb_byte from[I386_MAX_REGISTER_SIZE]; - gdb_assert (i386_fp_regnum_p (regnum)); + gdb_assert (i386_fp_regnum_p (get_frame_arch (frame), regnum)); /* We only support floating-point values. */ if (TYPE_CODE (type) != TYPE_CODE_FLT) @@ -337,7 +332,7 @@ i387_value_to_register (struct frame_info *frame, int regnum, { gdb_byte to[I386_MAX_REGISTER_SIZE]; - gdb_assert (i386_fp_regnum_p (regnum)); + gdb_assert (i386_fp_regnum_p (get_frame_arch (frame), regnum)); /* We only support floating-point values. */ if (TYPE_CODE (type) != TYPE_CODE_FLT) @@ -379,8 +374,8 @@ static int fsave_offset[] = 18 /* `fop' (bottom 11 bits). */ }; -#define FSAVE_ADDR(fsave, regnum) \ - (fsave + fsave_offset[regnum - I387_ST0_REGNUM]) +#define FSAVE_ADDR(tdep, fsave, regnum) \ + (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)]) /* Fill register REGNUM in REGCACHE with the appropriate value from @@ -396,13 +391,7 @@ i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave) gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); - /* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the - proper definitions for REGCACHE's architecture. */ - -#define I387_ST0_REGNUM tdep->st0_regnum -#define I387_NUM_XMM_REGS tdep->num_xmm_regs - - for (i = I387_ST0_REGNUM; i < I387_XMM0_REGNUM; i++) + for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++) if (regnum == -1 || regnum == i) { if (fsave == NULL) @@ -413,35 +402,32 @@ i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave) /* Most of the FPU control registers occupy only 16 bits in the fsave area. Give those a special treatment. */ - if (i >= I387_FCTRL_REGNUM - && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM) + if (i >= I387_FCTRL_REGNUM (tdep) + && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) { gdb_byte val[4]; - memcpy (val, FSAVE_ADDR (regs, i), 2); + memcpy (val, FSAVE_ADDR (tdep, regs, i), 2); val[2] = val[3] = 0; - if (i == I387_FOP_REGNUM) + if (i == I387_FOP_REGNUM (tdep)) val[1] &= ((1 << 3) - 1); regcache_raw_supply (regcache, i, val); } else - regcache_raw_supply (regcache, i, FSAVE_ADDR (regs, i)); + regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i)); } /* Provide dummy values for the SSE registers. */ - for (i = I387_XMM0_REGNUM; i < I387_MXCSR_REGNUM; i++) + for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++) if (regnum == -1 || regnum == i) regcache_raw_supply (regcache, i, NULL); - if (regnum == -1 || regnum == I387_MXCSR_REGNUM) + if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep)) { gdb_byte buf[4]; store_unsigned_integer (buf, 4, 0x1f80); - regcache_raw_supply (regcache, I387_MXCSR_REGNUM, buf); + regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf); } - -#undef I387_ST0_REGNUM -#undef I387_NUM_XMM_REGS } /* Fill register REGNUM (if it is a floating-point register) in *FSAVE @@ -458,35 +444,30 @@ i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave) gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); - /* Define I387_ST0_REGNUM such that we use the proper definitions - for REGCACHE's architecture. */ -#define I387_ST0_REGNUM tdep->st0_regnum - - for (i = I387_ST0_REGNUM; i < I387_XMM0_REGNUM; i++) + for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++) if (regnum == -1 || regnum == i) { /* Most of the FPU control registers occupy only 16 bits in the fsave area. Give those a special treatment. */ - if (i >= I387_FCTRL_REGNUM - && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM) + if (i >= I387_FCTRL_REGNUM (tdep) + && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) { gdb_byte buf[4]; regcache_raw_collect (regcache, i, buf); - if (i == I387_FOP_REGNUM) + if (i == I387_FOP_REGNUM (tdep)) { /* The opcode occupies only 11 bits. Make sure we don't touch the other bits. */ buf[1] &= ((1 << 3) - 1); - buf[1] |= ((FSAVE_ADDR (regs, i))[1] & ~((1 << 3) - 1)); + buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1)); } - memcpy (FSAVE_ADDR (regs, i), buf, 2); + memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2); } else - regcache_raw_collect (regcache, i, FSAVE_ADDR (regs, i)); + regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i)); } -#undef I387_ST0_REGNUM } @@ -530,8 +511,8 @@ static int fxsave_offset[] = 160 + 15 * 16, /* ... %xmm15 (128 bits each). */ }; -#define FXSAVE_ADDR(fxsave, regnum) \ - (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM]) +#define FXSAVE_ADDR(tdep, fxsave, regnum) \ + (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)]) /* We made an unfortunate choice in putting %mxcsr after the SSE registers %xmm0-%xmm7 instead of before, since it makes supporting @@ -557,13 +538,7 @@ i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave) gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); gdb_assert (tdep->num_xmm_regs > 0); - /* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the - proper definitions for REGCACHE's architecture. */ - -#define I387_ST0_REGNUM tdep->st0_regnum -#define I387_NUM_XMM_REGS tdep->num_xmm_regs - - for (i = I387_ST0_REGNUM; i < I387_MXCSR_REGNUM; i++) + for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++) if (regnum == -1 || regnum == i) { if (regs == NULL) @@ -574,16 +549,16 @@ i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave) /* Most of the FPU control registers occupy only 16 bits in the fxsave area. Give those a special treatment. */ - if (i >= I387_FCTRL_REGNUM && i < I387_XMM0_REGNUM - && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM) + if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep) + && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) { gdb_byte val[4]; - memcpy (val, FXSAVE_ADDR (regs, i), 2); + memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2); val[2] = val[3] = 0; - if (i == I387_FOP_REGNUM) + if (i == I387_FOP_REGNUM (tdep)) val[1] &= ((1 << 3) - 1); - else if (i== I387_FTAG_REGNUM) + else if (i== I387_FTAG_REGNUM (tdep)) { /* The fxsave area contains a simplified version of the tag word. We have to look at the actual 80-bit @@ -593,7 +568,8 @@ i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave) int fpreg; int top; - top = ((FXSAVE_ADDR (regs, I387_FSTAT_REGNUM))[1] >> 3); + top = ((FXSAVE_ADDR (tdep, regs, + I387_FSTAT_REGNUM (tdep)))[1] >> 3); top &= 0x7; for (fpreg = 7; fpreg >= 0; fpreg--) @@ -602,8 +578,9 @@ i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave) if (val[0] & (1 << fpreg)) { - int regnum = (fpreg + 8 - top) % 8 + I387_ST0_REGNUM; - tag = i387_tag (FXSAVE_ADDR (regs, regnum)); + int regnum = (fpreg + 8 - top) % 8 + + I387_ST0_REGNUM (tdep); + tag = i387_tag (FXSAVE_ADDR (tdep, regs, regnum)); } else tag = 3; /* Empty */ @@ -616,20 +593,17 @@ i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave) regcache_raw_supply (regcache, i, val); } else - regcache_raw_supply (regcache, i, FXSAVE_ADDR (regs, i)); + regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i)); } - if (regnum == I387_MXCSR_REGNUM || regnum == -1) + if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1) { if (regs == NULL) - regcache_raw_supply (regcache, I387_MXCSR_REGNUM, NULL); + regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL); else - regcache_raw_supply (regcache, I387_MXCSR_REGNUM, + regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), FXSAVE_MXCSR_ADDR (regs)); } - -#undef I387_ST0_REGNUM -#undef I387_NUM_XMM_REGS } /* Fill register REGNUM (if it is a floating-point or SSE register) in @@ -647,32 +621,26 @@ i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave) gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); gdb_assert (tdep->num_xmm_regs > 0); - /* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the - proper definitions for REGCACHE's architecture. */ - -#define I387_ST0_REGNUM tdep->st0_regnum -#define I387_NUM_XMM_REGS tdep->num_xmm_regs - - for (i = I387_ST0_REGNUM; i < I387_MXCSR_REGNUM; i++) + for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++) if (regnum == -1 || regnum == i) { /* Most of the FPU control registers occupy only 16 bits in the fxsave area. Give those a special treatment. */ - if (i >= I387_FCTRL_REGNUM && i < I387_XMM0_REGNUM - && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM) + if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep) + && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) { gdb_byte buf[4]; regcache_raw_collect (regcache, i, buf); - if (i == I387_FOP_REGNUM) + if (i == I387_FOP_REGNUM (tdep)) { /* The opcode occupies only 11 bits. Make sure we don't touch the other bits. */ buf[1] &= ((1 << 3) - 1); - buf[1] |= ((FXSAVE_ADDR (regs, i))[1] & ~((1 << 3) - 1)); + buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1)); } - else if (i == I387_FTAG_REGNUM) + else if (i == I387_FTAG_REGNUM (tdep)) { /* Converting back is much easier. */ @@ -691,18 +659,15 @@ i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave) buf[0] |= (1 << fpreg); } } - memcpy (FXSAVE_ADDR (regs, i), buf, 2); + memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2); } else - regcache_raw_collect (regcache, i, FXSAVE_ADDR (regs, i)); + regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i)); } - if (regnum == I387_MXCSR_REGNUM || regnum == -1) - regcache_raw_collect (regcache, I387_MXCSR_REGNUM, + if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1) + regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep), FXSAVE_MXCSR_ADDR (regs)); - -#undef I387_ST0_REGNUM -#undef I387_NUM_XMM_REGS } /* Recreate the FTW (tag word) valid bits from the 80-bit FP data in @@ -762,22 +727,17 @@ i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache) struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); ULONGEST fstat; - /* Define I387_ST0_REGNUM such that we use the proper - definitions for the architecture. */ -#define I387_ST0_REGNUM tdep->st0_regnum - /* Set the top of the floating-point register stack to 7. The actual value doesn't really matter, but 7 is what a normal function return would end up with if the program started out with a freshly initialized FPU. */ - regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat); + regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat); fstat |= (7 << 11); - regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat); + regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat); /* Mark %st(1) through %st(7) as empty. Since we set the top of the floating-point register stack to 7, the appropriate value for the tag word is 0x3fff. */ - regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff); + regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff); -#undef I387_ST0_REGNUM } |