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authorMark Kettenis <kettenis@gnu.org>2003-09-27 21:57:56 +0000
committerMark Kettenis <kettenis@gnu.org>2003-09-27 21:57:56 +0000
commit5716833cf88e806df832f6185960991cc15772a6 (patch)
tree76a8d2b5f9e0bb9e08bc0013db719ad211a8c34d /gdb/i386-tdep.h
parent41d35cb0fe5aff6050e3dce2506a51876d10d26a (diff)
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* i386-tdep.h: Put opaque declarations in alphabetical
order. Remove spurious whitespace. (struct gdbarch_tdep): add st0_regnum and mm0_regnum members. (i386_sse_regnum_p, i386_mxcsr_regnum_p): Remove prototypes. * i386-tdep.c (MM0_REGNUM): Remove define. (i386_mmx_regnum_p): Add gdbarch argument. (i386_sse_regnum_p, i386_mxcsr_regnum_p): Add gdbarch argument. Rewrite using new macro definitions for FPU/SSE registers. (i386_fp_regnum_p, i386_fpc_regnum_p): Rewrite using new macro definitions from i387-tdep.h. (i386_register_name): Update. (i386_stab_reg_to_regnum, i386_dwarf_reg_to_regnum): Update to use new macro definitions for FPU/SSE registers. (i386_extract_return_value): Determine whether floating-point registers are present by examining REGCACHE's architecture. (i386_store_return_value): Likewise. Use I386_MAX_REGISTER_SIZE instead of FPU_REG_RAW_SIZE. Use new macro definitions for FPU/SSE registers. (i386_register_type): Update. (i386_mmx_regnum_to_fp_regnum): Rewrite using new macro definitions for FPU registers. Use REGCACHE's architecture to determine the appropriate register numbers. (i386_pseudo_register_read, i386_pseudo_register_write, i386_register_reggroup_p): Update. (i386_gdbarch_init): Initialize TDEP->st0_regnum and TDEP->mm0_regnum. * i387-tdep.h (I387_FCTRL_REGNUM, I387_FSTAT_REGNUM, I387_FTAG_REGNUM, I387_FISEG_REGNUM, I387_FIOFF_REGNUM, I387_FOSEG_REGNUM, I387_FOOFF_REGNUM, I387_FOP_REGNUM, I387_XMM0_REGNUM, I387_MXCSR_REGNUM): New defines. (i387_supply_fsave, i387_fill_fsave, i387_supply_fxsave, i387_fill_fxsave): Change type of fsave/fxsave argument from `char *' to `void *'. * i387-tdep.c (i387_print_float_info, fsave_offset, FSAVE_ADDR, i387_supply_fsave, i387_fill_fsave, fxsave_offset, FXSAVE_ADDR, i387_supply_fxsave, i387_fill_fxsave): Update to use new macro definitions for FPU/SSE registers. (FXSAVE_MXCSR_ADDR): New define. * x86-64-tdep.c (x86_64_init_abi): Override TDEP->st0_regnum and TDEP->mm0_regnum. (I387_FISEG_REGNUM, I387_FOSEG_REGNUM): Remove defines. (I387_ST0_REGNUM): Define.
Diffstat (limited to 'gdb/i386-tdep.h')
-rw-r--r--gdb/i386-tdep.h22
1 files changed, 13 insertions, 9 deletions
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index 7412b8e..6c4cf73 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -1,4 +1,5 @@
-/* Target-dependent code for GDB, the GNU debugger.
+/* Target-dependent code for the i386.
+
Copyright 2001, 2002, 2003
Free Software Foundation, Inc.
@@ -22,9 +23,9 @@
#ifndef I386_TDEP_H
#define I386_TDEP_H
-struct reggroup;
-struct gdbarch;
struct frame_info;
+struct gdbarch;
+struct reggroup;
/* GDB's i386 target supports both the 32-bit Intel Architecture
(IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
@@ -55,6 +56,15 @@ enum struct_return
/* i386 architecture specific information. */
struct gdbarch_tdep
{
+ /* Register number for %st(0). The register numbers for the other
+ registers follow from this one. Set this to -1 to indicate the
+ absence of an FPU. */
+ int st0_regnum;
+
+ /* Register number for %mm0. Set this to -1 to indicate the absence
+ of MMX support. */
+ int mm0_regnum;
+
/* Number of SSE registers. */
int num_xmm_regs;
@@ -131,11 +141,6 @@ extern int i386_fpc_regnum_p (int regnum);
#define MXCSR_REGNUM \
(XMM0_REGNUM + gdbarch_tdep (current_gdbarch)->num_xmm_regs)
-/* Return non-zero if REGNUM matches the SSE register and the SSE
- register set is active. */
-extern int i386_sse_regnum_p (int regnum);
-extern int i386_mxcsr_regnum_p (int regnum);
-
/* FIXME: kettenis/2001-11-24: Obsolete macro's. */
#define FCS_REGNUM FISEG_REGNUM
#define FCOFF_REGNUM FIOFF_REGNUM
@@ -194,4 +199,3 @@ extern int i386obsd_sc_reg_offset[];
extern int i386bsd_sc_reg_offset[];
#endif /* i386-tdep.h */
-