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authorJohn Baldwin <jhb@FreeBSD.org>2019-03-12 13:39:02 -0700
committerJohn Baldwin <jhb@FreeBSD.org>2019-03-12 13:45:23 -0700
commitdd6876c91cd40cc105b1a91f418ca2c80683b314 (patch)
tree394033e0658212a6461dd32784d158ff1d16f6e6 /gdb/i386-fbsd-tdep.c
parent1163a4b7a38a79ebd153dc5ee76ce93877d21dbd (diff)
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Support fs_base and gs_base on FreeBSD/i386.
The i386 BSD native target uses the same ptrace operations (PT_[GS]ET[FG]SBASE) as the amd64 BSD native target to fetch and store the registers. The amd64 BSD native now uses 'tdep->fsbase_regnum' instead of hardcoding AMD64_FSBASE_REGNUM and AMD64_GSBASE_REGNUM to support 32-bit targets. In addition, the store operations explicitly zero the new register value before fetching it from the register cache to ensure 32-bit values are zero-extended. gdb/ChangeLog: * amd64-bsd-nat.c (amd64bsd_fetch_inferior_registers): Use tdep->fsbase_regnum instead of constants for fs_base and gs_base. (amd64bsd_store_inferior_registers): Likewise. * amd64-fbsd-nat.c (amd64_fbsd_nat_target::read_description): Enable segment base registers. * i386-bsd-nat.c (i386bsd_fetch_inferior_registers): Use PT_GETFSBASE and PT_GETGSBASE. (i386bsd_store_inferior_registers): Use PT_SETFSBASE and PT_SETGSBASE. * i386-fbsd-nat.c (i386_fbsd_nat_target::read_description): Enable segment base registers. * i386-fbsd-tdep.c (i386fbsd_core_read_description): Likewise.
Diffstat (limited to 'gdb/i386-fbsd-tdep.c')
-rw-r--r--gdb/i386-fbsd-tdep.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/gdb/i386-fbsd-tdep.c b/gdb/i386-fbsd-tdep.c
index 2f28bad..ac57e73 100644
--- a/gdb/i386-fbsd-tdep.c
+++ b/gdb/i386-fbsd-tdep.c
@@ -267,7 +267,7 @@ i386fbsd_core_read_description (struct gdbarch *gdbarch,
struct target_ops *target,
bfd *abfd)
{
- return i386_target_description (i386fbsd_core_read_xcr0 (abfd), false);
+ return i386_target_description (i386fbsd_core_read_xcr0 (abfd), true);
}
/* Similar to i386_supply_fpregset, but use XSAVE extended state. */