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authorTristan Gingold <gingold@adacore.com>2009-10-22 12:43:57 +0000
committerTristan Gingold <gingold@adacore.com>2009-10-22 12:43:57 +0000
commit46187dff42a1e0d0c3e6085a43a7abf6c2055b2b (patch)
tree3feb3414e399858e0edcc67fb024754d2621e563 /gdb/i386-darwin-nat.c
parent5bce4bde2d5ff6147840f9004093ee655bc23d23 (diff)
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2009-10-22 Tristan Gingold <gingold@adacore.com>
* i386-darwin-nat.c (i386_darwin_fetch_inferior_registers): Use amd64_supply_fxsave for amd64. Fix the offset. (i386_darwin_store_inferior_registers): Use amd64_collect_fxsave for amd64.
Diffstat (limited to 'gdb/i386-darwin-nat.c')
-rw-r--r--gdb/i386-darwin-nat.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/gdb/i386-darwin-nat.c b/gdb/i386-darwin-nat.c
index 3283723..340a65f 100644
--- a/gdb/i386-darwin-nat.c
+++ b/gdb/i386-darwin-nat.c
@@ -40,6 +40,7 @@
#ifdef BFD64
#include "amd64-nat.h"
+#include "amd64-tdep.h"
#include "amd64-darwin-tdep.h"
#endif
@@ -89,7 +90,7 @@ i386_darwin_fetch_inferior_registers (struct target_ops *ops,
printf_unfiltered (_("Error calling thread_get_state for float registers for thread 0x%ulx"), current_thread);
MACH_CHECK_ERROR (ret);
}
- i387_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64);
+ amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
fetched++;
}
}
@@ -194,7 +195,7 @@ i386_darwin_store_inferior_registers (struct target_ops *ops,
gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);
- i387_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);
+ amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);
ret = thread_set_state (current_thread, x86_FLOAT_STATE,
(thread_state_t) & fp_regs,